公开(公告)号：US07863944B2

公开(公告)日：2011-01-04

申请号：US12400909

申请日：2009-03-10

申请人： Zhengyu Wang ,  Milad Alwardi

发明人： Zhengyu Wang ,  Milad Alwardi

IPC分类号： H03K5/00

CPC分类号： H03K5/19

摘要： A clock detector is provided. The clock detector generally comprises a filter, a first branch, a second branch, a latch, and logic. The filter is adapted to receive a clock signal and is coupled to a low threshold inverter in the first branch and a high threshold inverter in the second branch. The latch is adapted to receive the clock signal and is coupled to the first branch, while the logic is coupled to the node between the first branch and the latch, an output of the latch, and the second branch so that it can output a clock detection signal.

摘要翻译： 提供时钟检测器。 时钟检测器通常包括滤波器，第一分支，第二分支，锁存器和逻辑。 滤波器适于接收时钟信号，并且耦合到第一分支中的低阈值反相器和第二分支中的高阈值反相器。 锁存器适于接收时钟信号并且耦合到第一分支，而逻辑耦合到第一分支和锁存器之间的节点，锁存器的输出和第二分支，使得其可以输出时钟 检测信号。

公开(公告)号：US20100231264A1

公开(公告)日：2010-09-16

申请号：US12400909

申请日：2009-03-10

申请人： Zhengyu Wang ,  Milad Alwardi

发明人： Zhengyu Wang ,  Milad Alwardi

IPC分类号： H03D13/00

CPC分类号： H03K5/19

摘要： A clock detector is provided. The clock detector generally comprises a filter, a first branch, a second branch, a latch, and logic. The filter is adapted to receive a clock signal and is coupled to a low threshold inverter in the first branch and a high threshold inverter in the second branch. The latch is adapted to receive the clock signal and is coupled to the first branch, while the logic is coupled to the node between the first branch and the latch, an output of the latch, and the second branch so that it can output a clock detection signal.

摘要翻译： 提供时钟检测器。 时钟检测器通常包括滤波器，第一分支，第二分支，锁存器和逻辑。 滤波器适于接收时钟信号，并且耦合到第一分支中的低阈值反相器和第二分支中的高阈值反相器。 锁存器适于接收时钟信号并且耦合到第一分支，而逻辑耦合到第一分支和锁存器之间的节点，锁存器的输出和第二分支，使得其可以输出时钟 检测信号。

公开(公告)号：US06768951B2

公开(公告)日：2004-07-27

申请号：US10225620

申请日：2002-08-22

申请人： Milad Alwardi

发明人： Milad Alwardi

IPC分类号： G06F1900

CPC分类号： G01R31/3651 ,  G01R31/3648

摘要： An apparatus receives an indicating signal representing a parameter at a monitoring locus and includes: (a) A first measuring unit having a first input coupled for selectively receiving the indicating signal and presenting a first output signal that includes a first monitoring signal representing change in the indicating signal during a first time interval and a first benchmark signal indicating change imparted to signals by the first measuring unit. (b) A second measuring unit having a second input coupled for selectively receiving the indicating signal and presenting a second output signal that includes a second monitoring signal representing change in the indicating signal during a second time interval and a second benchmark signal indicating change imparted to signals by the second measuring unit. (c) An accumulating and indicator unit coupled for receiving and evaluating the first and second output signals and generating an indicator signal that represents the evaluating.

公开(公告)号：US5965997A

公开(公告)日：1999-10-12

申请号：US915019

申请日：1997-08-20

申请人： Milad Alwardi ,  Wallace Edward Matthews ,  Dave Heacock ,  David Louis Freeman

发明人： Milad Alwardi ,  Wallace Edward Matthews ,  Dave Heacock ,  David Louis Freeman

IPC分类号： G01R31/36 ,  H01M10/46 ,  H01M10/44

CPC分类号： G01R31/3606 ,  G01R31/3655 ,  G01R31/362

摘要： A battery charge/discharge monitor circuit (10) is operable to be disposed in a battery pack (12) which can be connected to a battery (13). The monitor circuit (10) is operable to be connected to an external CPU (24) or similar system through a single wire communication port (22) for transferring information back and forth. There is also provided an external signal on a line (30) for indicating charge or discharge activity in the monitor circuit (10). The monitor circuit (10) is operable to collect information regarding the amount of charge input to the battery and the length of time that the charge is input to the battery and also the amount of charge that is removed from the battery and the length of time that the charge is removed. This information is stored in a memory block (62) for later access by the external CPU (24). This system also provides offset information to provide some type of compensation for non-linearities of the part. This offset is determined during a calibration operation which operates over a long period of time during a period of inactivity. Regulation circuitry is operable to provide internal regulation to the circuitry with an external JFET (20).

摘要翻译： 电池充电/放电监视电路（10）可操作地布置在可连接到电池（13）的电池组（12）中。 监视器电路（10）可操作以通过用于传送信息的单线通信端口（22）连接到外部CPU（24）或类似系统。 还在线路（30）上提供用于指示监视电路（10）中的充电或放电活动的外部信号。 监视器电路（10）可操作以收集关于输入到电池的电荷量的信息和电池输入到电池的时间长度以及从电池中取出的电荷量以及时间长度 电费被取消。 该信息被存储在存储器块（62）中，以供外部CPU（24）稍后访问。 该系统还提供偏移信息，为零件的非线性提供某种类型的补偿。 在偏移期间长时间运行的校准操作期间确定该偏移。 调节电路可操作以通过外部JFET（20）向电路提供内部调节。