Communication device employing LDPC (Low Density Parity Check) coding with Reed-Solomon (RS) and/or binary product coding
    1.
    发明申请
    Communication device employing LDPC (Low Density Parity Check) coding with Reed-Solomon (RS) and/or binary product coding 审中-公开
    采用Reed-Solomon(RS)和/或二进制产品编码的LDPC(低密度奇偶校验)编码的通信设备

    公开(公告)号:US20100241923A1

    公开(公告)日:2010-09-23

    申请号:US12726219

    申请日:2010-03-17

    摘要: Communication device employing LDPC (Low Density Parity Check) coding with Reed-Solomon (RS) and/or binary product coding. An LDPC code is concatenated with a RS code or a binary product code (e.g., using row and column encoding of matrix formatted bits) thereby generating coded bits for use in generating a signal that is suitable to be launched into a communication channel. Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. and various implementations of cyclic redundancy check (CRC) may accompany the product coding and/or additional ECC/FEC employed. The redundancy of such coded signals as generated using the principles herein are in the range of approximately 20% thereby providing a significant amount of redundancy and a high coding gain. Soft decision decoding may be performed on such coded signal generated herein.

    摘要翻译: 采用Reed-Solomon(RS)和/或二进制产品编码的LDPC(低密度奇偶校验)编码的通信设备。 LDPC码与RS码或二进制乘积码(例如,使用矩阵格式比特的行和列编码)连接,从而生成用于生成适合于发送到通信信道中的信号的编码比特。 可以采用各种ECC / FEC,包括BCH(Bose和Ray-Chaudhuri和Hocquenghem)码,Reed-Solomon(RS)码,LDPC(低密度奇偶校验)码等)和循环冗余校验的各种实现 (CRC)可以伴随产品编码和/或所使用的附加ECC / FEC。 使用本文原理生成的这种编码信号的冗余度在大约20%的范围内,从而提供显着量的冗余度和高的编码增益。 可以对这里生成的这种编码信号执行软判决解码。

    Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein
    2.
    发明授权
    Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein 失效
    采用其中选择性附加循环冗余校验(CRC)的二进制产品编码的通信设备

    公开(公告)号:US08572460B2

    公开(公告)日:2013-10-29

    申请号:US12726062

    申请日:2010-03-17

    IPC分类号: H03M13/00

    摘要: Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein. Product code encoding (e.g., employing row and column encoding of matrix formatted bits, selectively with interleaving and/or permutation of the bits therein) may be combined with additional error correction code (ECC) or forward error correction (FEC) coding thereby generating coded bits for use in generating a signal to be launched into a communication channel. Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. The redundancy of such coded signals as generated using the principles herein is in the range of approximately 7%, and hard decision decoding may be performed on such coded signals generated herein. In accordance with decoding such signals, various bit decisions (within certain iterations) may be selectively ignored and/or reverted back to previous bit decisions.

    摘要翻译: 采用其中选择性附加循环冗余校验(CRC)的二进制产品编码的通信设备。 产品代码编码(例如,采用矩阵格式化的比特的行和列编码,选择性地具有其中的比特的交织和/或置换)可以与附加的纠错码(ECC)或前向纠错(FEC)编码相结合,从而产生编码 用于产生要发送到通信信道的信号的位。 可以采用各种ECC / FEC,包括BCH(Bose和Ray-Chaudhuri,Hocquenghem)码,Reed-Solomon(RS)码,LDPC(低密度奇偶校验码)码等。 使用本文原理生成的范围在大约7%的范围内,并且可以对这里生成的这种编码信号进行硬判决解码。 根据解码这样的信号,可以选择性地忽略各种位决定(在某些迭代内)和/或还原回到先前的位决定。

    Communication device employing binary product coding with selective additional Cyclic Redundancy Check (CRC) therein
    3.
    发明申请
    Communication device employing binary product coding with selective additional Cyclic Redundancy Check (CRC) therein 失效
    采用二进制产品编码的通信设备,其中具有选择性的附加循环冗余校验(CRC)

    公开(公告)号:US20100241926A1

    公开(公告)日:2010-09-23

    申请号:US12726062

    申请日:2010-03-17

    IPC分类号: H03M13/00 G06F11/00

    摘要: Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein. Product code encoding (e.g., employing row and column encoding of matrix formatted bits, selectively with interleaving and/or permutation of the bits therein) may be combined with additional error correction code (ECC) or forward error correction (FEC) coding thereby generating coded bits for use in generating a signal to be launched into a communication channel. Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. The redundancy of such coded signals as generated using the principles herein is in the range of approximately 7%, and hard decision decoding may be performed on such coded signals generated herein. In accordance with decoding such signals, various bit decisions (within certain iterations) may be selectively ignored and/or reverted back to previous bit decisions.

    摘要翻译: 采用其中选择性附加循环冗余校验(CRC)的二进制产品编码的通信设备。 产品代码编码(例如,采用矩阵格式化的比特的行和列编码,选择性地具有其中的比特的交织和/或置换)可以与附加的纠错码(ECC)或前向纠错(FEC)编码相结合,从而产生编码 用于产生要发送到通信信道的信号的位。 可以使用各种ECC / FEC,包括BCH(Bose和Ray-Chaudhuri,Hocquenghem)码,Reed-Solomon(RS)码,LDPC(低密度奇偶校验码)码等。 使用本文原理生成的范围在大约7%的范围内,并且可以对这里生成的这种编码信号进行硬判决解码。 根据解码这样的信号,可以选择性地忽略各种位决定(在某些迭代内)和/或还原回到先前的位决定。