公开(公告)号：US07830987B2

公开(公告)日：2010-11-09

申请号：US11837301

申请日：2007-08-10

申请人： Sudeep Bhoja ,  Vasudevan Parthasarathy ,  Vivek Telang

发明人： Sudeep Bhoja ,  Vasudevan Parthasarathy ,  Vivek Telang

IPC分类号： H04L27/14

CPC分类号： H04L7/0062

摘要： Embodiments include a system for performing electronic dispersion compensation on an information-bearing signal transmitted over a communication channel. The system may include a channel identification module configured to receive a first digitized version of the information bearing signal and an equalized version of the information-bearing signal, and may be configured to determine an impulse response of the communication channel based thereon. The system may include a time varying phase detector configured to receive the equalized version of the information bearing signal, a second digitized version of the information-bearing signal, and the impulse response, and may be further configured to generate a reference wave based on the impulse response and the equalized version of the information-bearing signal. The time varying phase detector may be configured to generate a phase signal based on the reference wave and on an error signal determined from the reference wave and the second digitized version of the information-bearing signal.

摘要翻译： 实施例包括用于对通过通信信道发送的信息承载信号执行电子色散补偿的系统。 系统可以包括信道识别模块，其被配置为接收信息承载信号的第一数字化版本和信息承载信号的均衡版本，并且可以被配置为基于该信道识别模块来确定通信信道的脉冲响应。 系统可以包括时变相位检测器，其被配置为接收信息承载信号的均衡版本，信息承载信号的第二数字化版本和脉冲​​响应，并且还可以被配置为基于 脉冲响应和信息承载信号的均衡版本。 时变相位检测器可以被配置为基于参考波和从信息承载信号的参考波和第二数字化版本确定的误差信号来生成相位信号。

公开(公告)号：US20100241923A1

公开(公告)日：2010-09-23

申请号：US12726219

申请日：2010-03-17

申请人： Zhongfeng Wang ,  Ba-Zhong Shen ,  Kang Xiao ,  James R. Fife ,  Sudeep Bhoja

发明人： Zhongfeng Wang ,  Ba-Zhong Shen ,  Kang Xiao ,  James R. Fife ,  Sudeep Bhoja

IPC分类号： H03M13/29 ,  G06F11/10 ,  H03M13/15 ,  H03M13/07

CPC分类号： H03M13/255 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/253 ,  H03M13/2909 ,  H04L1/0057

摘要： Communication device employing LDPC (Low Density Parity Check) coding with Reed-Solomon (RS) and/or binary product coding. An LDPC code is concatenated with a RS code or a binary product code (e.g., using row and column encoding of matrix formatted bits) thereby generating coded bits for use in generating a signal that is suitable to be launched into a communication channel. Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. and various implementations of cyclic redundancy check (CRC) may accompany the product coding and/or additional ECC/FEC employed. The redundancy of such coded signals as generated using the principles herein are in the range of approximately 20% thereby providing a significant amount of redundancy and a high coding gain. Soft decision decoding may be performed on such coded signal generated herein.

摘要翻译： 采用Reed-Solomon（RS）和/或二进制产品编码的LDPC（低密度奇偶校验）编码的通信设备。 LDPC码与RS码或二进制乘积码（例如，使用矩阵格式比特的行和列编码）连接，从而生成用于生成适合于发送到通信信道中的信号的编码比特。 可以采用各种ECC / FEC，包括BCH（Bose和Ray-Chaudhuri和Hocquenghem）码，Reed-Solomon（RS）码，LDPC（低密度奇偶校验）码等）和循环冗余校验的各种实现 （CRC）可以伴随产品编码和/或所使用的附加ECC / FEC。 使用本文原理生成的这种编码信号的冗余度在大约20％的范围内，从而提供显着量的冗余度和高的编码增益。 可以对这里生成的这种编码信号执行软判决解码。

公开(公告)号：US20080069199A1

公开(公告)日：2008-03-20

申请号：US11845779

申请日：2007-08-27

申请人： Chung-Jue Chen ,  Vasudevan Parthasarathy ,  Sudeep Bhoja

发明人： Chung-Jue Chen ,  Vasudevan Parthasarathy ,  Sudeep Bhoja

IPC分类号： H03H7/30

CPC分类号： H04L25/061 ,  H04L25/03057 ,  H04L2025/03547

摘要： Embodiments include a decision feedback equalizer (DFE) that includes a first comparator configured to receive as inputs a soft value and a first threshold, a second comparator configured to receive as inputs the soft value and a second threshold, a selector configured to select an output of either the first comparator or the second comparator as a DFE output based on one or more previous bits output by the selector; an error calculator configured to determine an error for the first comparator and the second comparator, and a threshold adjuster configured to adjust the first threshold and the second threshold, the first threshold and the second threshold each being a non-linear combination of one or more previous outputs of the selector.

摘要翻译： 实施例包括判决反馈均衡器（DFE），其包括被配置为接收软值和第一阈值作为输入的第一比较器，被配置为接收软值和第二阈值作为输入的第二比较器，被配置为选择输出 基于由选择器输出的一个或多个以前的位，作为DFE输出的第一比较器或第二比较器; 配置为确定第一比较器和第二比较器的误差的误差计算器以及被配置为调整第一阈值和第二阈值的阈值调整器，第一阈值和第二阈值各自是一个或多个的非线性组合 选择器的先前输出。

公开(公告)号：US07003228B2

公开(公告)日：2006-02-21

申请号：US10677123

申请日：2003-09-30

申请人： John S. Wang ,  Sudeep Bhoja ,  Shanthi Pavan ,  Hai Tao

发明人： John S. Wang ,  Sudeep Bhoja ,  Shanthi Pavan ,  Hai Tao

IPC分类号： H04J14/08 ,  H04B10/12 ,  H04B1/10 ,  H03H7/30

CPC分类号： H04B10/6971

摘要： Improved high-speed adaptive equalization is presented that may involve converting an optical signal into an electrical signal and performing equalization by (i) filtering the electrical signal with an analog filter according to at least one filter coefficient to produce a filtered output, (ii) generating an error signal from the filtered output according to an error function, (iii) providing at least one control signal to the analog filter for adjusting the at least one filter coefficient, (iv) detecting a relationship between a change in the at least one filter coefficient and a change in the error signal, and (v) adjusting the at least one filter coefficient according to the relationship to minimize the error signal. The least one coefficient may comprise a plurality of coefficients, and the relationship may be a gradient estimate having multiple components, each determined by varying only one of the coefficients and detecting a resulting change in the error signal.

摘要翻译： 提出了改进的高速自适应均衡，其可以涉及将光信号转换成电信号并且通过（i）根据至少一个滤波器系数用模拟滤波器对电信号进行滤波以产生滤波后的输出，（ii） 根据误差函数从滤波的输出产生误差信号，（iii）向模拟滤波器提供至少一个控制信号以调整至少一个滤波器系数，（iv）检测至少一个滤波器系数的变化之间的关系 滤波器系数和误差信号的变化，以及（v）根据该关系调整至少一个滤波器系数以最小化误差信号。 最小一个系数可以包括多个系数，并且该关系可以是具有多个分量的梯度估计，每个分量通过仅改变一个系数并检测所产生的误差信号的变化来确定。

公开(公告)号：US06934869B1

公开(公告)日：2005-08-23

申请号：US09954453

申请日：2001-09-12

申请人： Sudeep Bhoja ,  John S. Wang ,  Chris R. Cole

发明人： Sudeep Bhoja ,  John S. Wang ,  Chris R. Cole

IPC分类号： G06F1/04 ,  H03D3/24 ,  H03L7/091 ,  H04L7/033

CPC分类号： H03L7/091 ,  H03L2207/50 ,  H04L7/033

摘要： A method and apparatus for eliminating dead zone in a phase locked loop with binary quantized detectors are described. Dead zone can be eliminated by changing the threshold used to quantize the cross point sample. A quantized cross point sample is integrated in order to set a new threshold. The integration may be performed during data transitions to eliminate threshold drift during long sequences where no transitions occur.

摘要翻译： 描述了一种用二进制量化检测器消除锁相环死区的方法和装置。 可以通过改变用于量化交叉点样本的阈值来消除死区。 积分量化交叉点样本以设置新的阈值。 可以在数据转换期间执行积分以消除在没有转变发生的长序列期间的阈值漂移。

公开(公告)号：US08572460B2

公开(公告)日：2013-10-29

申请号：US12726062

申请日：2010-03-17

申请人： Zhongfeng Wang ,  Chung-Jue Chen ,  Kang Xiao ,  Hongtao Jiang ,  James R. Fife ,  Sudeep Bhoja

发明人： Zhongfeng Wang ,  Chung-Jue Chen ,  Kang Xiao ,  Hongtao Jiang ,  James R. Fife ,  Sudeep Bhoja

IPC分类号： H03M13/00

CPC分类号： G06F11/10 ,  H04L1/005 ,  H04L1/0064

摘要： Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein. Product code encoding (e.g., employing row and column encoding of matrix formatted bits, selectively with interleaving and/or permutation of the bits therein) may be combined with additional error correction code (ECC) or forward error correction (FEC) coding thereby generating coded bits for use in generating a signal to be launched into a communication channel. Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. The redundancy of such coded signals as generated using the principles herein is in the range of approximately 7%, and hard decision decoding may be performed on such coded signals generated herein. In accordance with decoding such signals, various bit decisions (within certain iterations) may be selectively ignored and/or reverted back to previous bit decisions.

摘要翻译： 采用其中选择性附加循环冗余校验（CRC）的二进制产品编码的通信设备。 产品代码编码（例如，采用矩阵格式化的比特的行和列编码，选择性地具有其中的比特的交织和/或置换）可以与附加的纠错码（ECC）或前向纠错（FEC）编码相结合，从而产生编码 用于产生要发送到通信信道的信号的位。 可以采用各种ECC / FEC，包括BCH（Bose和Ray-Chaudhuri，Hocquenghem）码，Reed-Solomon（RS）码，LDPC（低密度奇偶校验码）码等。 使用本文原理生成的范围在大约7％的范围内，并且可以对这里生成的这种编码信号进行硬判决解码。 根据解码这样的信号，可以选择性地忽略各种位决定（在某些迭代内）和/或还原回到先前的位决定。

公开(公告)号：US07924910B2

公开(公告)日：2011-04-12

申请号：US11029297

申请日：2005-01-04

申请人： Sudeep Bhoja ,  John S. Wang ,  Hai Tao

发明人： Sudeep Bhoja ,  John S. Wang ,  Hai Tao

IPC分类号： H03H7/30

CPC分类号： H04L25/03057 ,  H03H15/00 ,  H03H21/0012 ,  H04L7/0062 ,  H04L12/66 ,  H04L2025/0349 ,  H04L2025/03509 ,  H04L2025/03681

摘要： Methods, apparatuses, and systems are presented for performing adaptive equalization involving receiving a signal originating from a channel associated with inter-symbol interference, filtering the signal using a filter having a plurality of adjustable tap weights to produce a filtered signal, and adaptively updating each of the plurality of adjustable tap weights to a new value to reduce effects of inter-symbol interference, wherein each of the plurality of adjustable tap weights is adaptively updated to take into account a constraint relating to a measure of error in the filtered signal and a constraint relating to group delay associated with the filter. Each of the plurality of adjustable tap weights may be adaptively updated to drive group delay associated with the filter toward a target group delay.

摘要翻译： 呈现用于执行自适应均衡的方法，装置和系统，该自适应均衡涉及接收与符号间干扰相关联的信道的信号，使用具有多个可调抽头权重的滤波器对该信号进行滤波以产生滤波信号，以及自适应地更新每个 将多个可调节抽头权重分配到新值以减少符号间干扰的影响，其中多个可调节抽头权重中的每一个被自适应地更新以考虑与滤波信号中的误差测量有关的约束，以及 与过滤器相关的组延迟有关的约束。 可以自适应地更新多个可调节抽头权重中的每一个以将与过滤器相关联的群组延迟朝向目标组延迟。

公开(公告)号：US20100241926A1

公开(公告)日：2010-09-23

申请号：US12726062

申请日：2010-03-17

申请人： Zhongfeng Wang ,  Chung-Jue Chen ,  Kang Xiao ,  Hongtao Jiang ,  James R. Fife ,  Sudeep Bhoja

发明人： Zhongfeng Wang ,  Chung-Jue Chen ,  Kang Xiao ,  Hongtao Jiang ,  James R. Fife ,  Sudeep Bhoja

IPC分类号： H03M13/00 ,  G06F11/00

CPC分类号： G06F11/10 ,  H04L1/005 ,  H04L1/0064

摘要： Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein. Product code encoding (e.g., employing row and column encoding of matrix formatted bits, selectively with interleaving and/or permutation of the bits therein) may be combined with additional error correction code (ECC) or forward error correction (FEC) coding thereby generating coded bits for use in generating a signal to be launched into a communication channel. Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. The redundancy of such coded signals as generated using the principles herein is in the range of approximately 7%, and hard decision decoding may be performed on such coded signals generated herein. In accordance with decoding such signals, various bit decisions (within certain iterations) may be selectively ignored and/or reverted back to previous bit decisions.

摘要翻译： 采用其中选择性附加循环冗余校验（CRC）的二进制产品编码的通信设备。 产品代码编码（例如，采用矩阵格式化的比特的行和列编码，选择性地具有其中的比特的交织和/或置换）可以与附加的纠错码（ECC）或前向纠错（FEC）编码相结合，从而产生编码 用于产生要发送到通信信道的信号的位。 可以使用各种ECC / FEC，包括BCH（Bose和Ray-Chaudhuri，Hocquenghem）码，Reed-Solomon（RS）码，LDPC（低密度奇偶校验码）码等。 使用本文原理生成的范围在大约7％的范围内，并且可以对这里生成的这种编码信号进行硬判决解码。 根据解码这样的信号，可以选择性地忽略各种位决定（在某些迭代内）和/或还原回到先前的位决定。

公开(公告)号：US20080260015A1

公开(公告)日：2008-10-23

申请号：US11943569

申请日：2007-11-20

申请人： John S. Wang ,  Sudeep Bhoja ,  Shanthi Pavan

发明人： John S. Wang ,  Sudeep Bhoja ,  Shanthi Pavan

IPC分类号： H03H7/40

CPC分类号： H04B10/6971

摘要： A method and apparatus for improved high-speed adaptive equalization that may operate effectively even in systems experiencing severe interference by using one or more error generators and taking multiple samples across a bit interval. Advantageously, a preferred embodiment of the current invention may be deployed in a clockless configuration. Preferably, one or more controllable analog filters may be controlled by one or more microprocessors used to assess the error data from the error generators and to calculate the appropriate coefficients for the filters according to one or more error minimization algorithms. Preferably, the steps of sampling, assessment, calculation and coefficient setting may be done iteratively to converge to an optimum set of filter values and/or respond dynamically to signals with time-varying noise and interference characteristics.

摘要翻译： 一种用于改进高速自适应均衡的方法和装置，即使在使用一个或多个误差发生器并且跨越一个位间隔采取多个采样的经历严重干扰的系统中也可以有效地运行。 有利地，本发明的优选实施例可以部署在无时钟配置中。 优选地，一个或多个可控模拟滤波器可以由一个或多个微处理器来控制，所述微处理器用于根据一个或多个误差最小化算法来估计来自误差发生器的误差数据并计算滤波器的适当系数。 优选地，可以迭代地进行采样，评估，计算和系数设置的步骤以收敛到滤波器值的最佳集合和/或动态地响应具有时变噪声和干扰特性的信号。

公开(公告)号：US06545567B1

公开(公告)日：2003-04-08

申请号：US09955563

申请日：2001-09-17

申请人： Shanthi Pavan ,  Sudeep Bhoja ,  John S. Wang

发明人： Shanthi Pavan ,  Sudeep Bhoja ,  John S. Wang

IPC分类号： H03H1500

CPC分类号： H03H15/00

摘要： Method and system for a programmable analog tapped delay line filter are disclosed. One embodiment of the present invention is a programmable analog tapped delay line filter comprising an input line, an output line, and one or more gaincells or taps coupled between the input line and the output line. The input and output lines each comprises a cascade of one or more differential delay cells, and each of the one or more gaincells or taps corresponds to a tap weight or coefficient. Furthermore, the input and output lines are terminated in impedances and the filter produces one or more outputs.

摘要翻译： 公开了可编程模拟抽头延迟线滤波器的方法和系统。 本发明的一个实施例是可编程模拟抽头延迟线滤波器，包括输入线，输出线以及耦合在输入线和输出线之间的一个或多个增益电池或抽头。 输入和输出线各自包括一个或多个差分延迟单元的级联，并且一个或多个增益单元或抽头中的每一个对应于抽头权重或系数。 此外，输入和输出线在阻抗中终止，并且滤波器产生一个或多个输出。