公开(公告)号：US20030093721A1

公开(公告)日：2003-05-15

申请号：US09961950

申请日：2001-09-24

申请人： International Busiess Machines Corporation

发明人： Allen King ,  Davis Qi-Yu Chu

IPC分类号： H04L001/22

CPC分类号： G11B25/043

摘要： A disk array storage system and error recovery method wherein recovery from disk errors is achieved using automated selective power cycling. Initially, identification is made of a faulty disk drive in the array that exhibits an error condition in which the drive fails to perform a requested operation. The faulty disk drive is selectively power cycled while power to other disk drives in the array is maintained. Following the power cycling sequence, the requested operation is retried.

摘要翻译： 磁盘阵列存储系统和错误恢复方法，其中使用自动选择性功率循环实现从磁盘错误的恢复。 最初，识别阵列中出现错误状况的故障磁盘驱动器，其中驱动器无法执行请求的操作。 有故障的磁盘驱动器选择性地重新上电，同时保持阵列中其他磁盘驱动器的电源。 按照电源循环顺序，重试所请求的操作。

公开(公告)号：US08587905B2

公开(公告)日：2013-11-19

申请号：US13480390

申请日：2012-05-24

申请人： Peter VanderSalm Koeppe

发明人： Peter VanderSalm Koeppe

IPC分类号： G11B5/33 ,  G11B5/127

CPC分类号： G11B5/4893 ,  G11B5/00826 ,  G11B5/187

摘要： In one general embodiment, a magnetic head comprises an inner module comprising an array of data readers; and first and second outer modules flanking the inner module. The outer modules are identical, each outer module comprising an array of data writers. A number of active data writers in each outer module is less than a number of active data readers in the inner module. For the first outer module, one of the active data writers is aligned with one of the data reader positioned towards a first end of the inner module array in a direction generally parallel to the path of tape travel thereacross. For the second outer module, one of the active data writers is aligned with one of the data readers positioned towards a second end of the inner module array in the direction generally parallel to the path of tape travel thereacross.

摘要翻译： 在一个一般实施例中，磁头包括内部模块，该内部模块包括数据读取器阵列; 以及位于内部模块侧面的第一和第二外部模块。 外部模块是相同的，每个外部模块包括一组数据写入器。 每个外部模块中的一些活动数据写入器少于内部模块中的多个活动数据读取器。 对于第一外部模块，其中一个活动数据写入器与数据读取器中的一个对齐，该数据读取器沿着大致平行于其上的磁带传播路径的方向朝向内部模块阵列的第一端定位。 对于第二外部模块，其中一个活动数据写入器与其中一个数据读取器对准，该数据读取器沿着大致平行于其上的磁带传播路径的方向定位在内部模块阵列的第二端。

公开(公告)号：US10552118B2

公开(公告)日：2020-02-04

申请号：US16458673

申请日：2019-07-01

申请人： International Business Machines Corporation

发明人： Tamer E. Abuelsaad ,  Gregory J. Boss ,  John E. Moore, Jr. ,  Randy A. Rendahl

IPC分类号： G06F3/16 ,  G10L15/26 ,  G10L15/08 ,  H04M3/56 ,  G10L15/18 ,  G10L21/0272 ,  G10L17/22 ,  G10L15/02

摘要： A computer-implemented method includes identifying a first set of utterances from a plurality of utterances. The plurality of utterances is associated with a conversation and transmitted via a plurality of audio signals. The computer-implemented method further includes mining the first set of utterances for a first context. The computer-implemented method further includes determining that the first context associated with the first set of utterances is not relevant to a second context associated with the conversation. The computer-implemented method further includes dynamically muting, for at least a first period of time, a first audio signal in the plurality of audio signals corresponding to the first set of utterances. A corresponding computer system and computer program product are also disclosed.

公开(公告)号：US10216653B2

公开(公告)日：2019-02-26

申请号：US15723949

申请日：2017-10-03

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Lakshminarayana Baba Arimilli ,  Yiftach Benjamini ,  Bartholomew Blaner ,  Daniel M. Dreps ,  John David Irish ,  David J. Krolak ,  Lonny Lambrecht ,  Michael S. Siegel ,  William J. Starke ,  Jeffrey A. Stuecheli ,  Kenneth M. Valk ,  Curtis C. Wollbrink

IPC分类号： G06F13/16 ,  G06F13/42 ,  G06F3/06

摘要： A serial communication system includes a transmitting circuit for serially transmitting data via a serial communication link including N channels where N is an integer greater than 1. The transmitting circuit includes an input buffer having storage for input data frames each including M bytes forming N segments of M/N contiguous bytes. The transmitting circuit additionally includes a reordering circuit coupled to the input buffer. The reordering circuit includes a reorder buffer including multiple entries. The reordering circuit buffers, in each of multiple entries of the reorder buffer, a byte in a common byte position in each of the N segments of an input data frame. The reordering circuit sequentially outputs the contents of the entries of the reorder buffer via the N channels of the serial communication link.

公开(公告)号：US20080283285A1

公开(公告)日：2008-11-20

申请号：US12169778

申请日：2008-07-09

申请人： Roland Frech ,  Thomas-Michael Winkel ,  Erich Klink

发明人： Roland Frech ,  Thomas-Michael Winkel ,  Erich Klink

IPC分类号： H05K1/11

CPC分类号： H04L7/0008 ,  G06F1/10 ,  G06F1/14 ,  H04L7/0037

摘要： A circuit arrangement comprising a set of signal layers, a set of first power layers, a set of second power layers, a set of signal vias, a set of first power vias, a set of second power vias, wherein a signal via of the set of signal vias provides a signal path for a high-frequency (HF) signal current, wherein at least a power via of the set of first power vias and at least a power via of the set of second power vias provide return paths for return currents associated with the signal current, wherein the return path provided by the power via of the set of second power vias is connected with a power layer of the set of second power layers, wherein at least one power layer of the set of first power layers is arranged between the power layer of the set of second power layers and each signal layer of the set of signal layers.

摘要翻译： 一种电路装置，包括一组信号层，一组第一功率层，一组第二功率层，一组信号通路，一组第一功率通孔，一组第二电源通孔，其中， 一组信号通孔提供用于高频（HF）信号电流的信号路径，其中至少一组第一电源通孔的功率通孔和至少一组第二电源通孔的功率通路提供用于返回的返回路径 与信号电流相关联的电流，其中由所述一组第二电力通孔的电力通路提供的返回路径与所述一组第二电力层的功率层连接，其中所述一组第一电力层的至少一个功率层 布置在该组第二功率层的功率层与该组信号层的每个信号层之间。