公开(公告)号：US6104249A

公开(公告)日：2000-08-15

申请号：US225841

申请日：1998-12-31

Applicant: Michael J. Callahan, Jr.

Inventor： Michael J. Callahan, Jr.

IPC: H03F1/22 ,  H03F3/04

CPC classification number: H03F1/223

Abstract: An integrated circuit includes a transconductance circuit having a bias current generator coupled to a power supply. The bias current generator may include a current mirror circuit having an input and an output, where a current at the output is proportional to a current at the input. A first constant current source in the transconductance circuit has a first electrode coupled to the power supply. The transconductance circuit also includes first and second transistors and a diode. The diode is forward biased by the bias current generator. The first transistor has a collector coupled to a second electrode of the first constant current source and to a signal output. The second transistor has a drain coupled to an emitter of the first transistor, a source coupled to a reference voltage and a gate coupled to a signal input. The diode has an anode coupled to a base of the first transistor and a cathode coupled to a constant voltage source. The current through the diode results in a drain-source voltage of the second transistor being constant. As a result, the transconductance circuit operation is linearized, and distortion due to drain-source voltage variation in the second transistor is reduced.

Abstract translation: 集成电路包括具有耦合到电源的偏置电流发生器的跨导电路。 偏置电流发生器可以包括具有输入和输出的电流镜电路，其中输出处的电流与输入处的电流成比例。 跨导电路中的第一恒定电流源具有耦合到电源的第一电极。 跨导电路还包括第一和第二晶体管和二极管。 二极管由偏置电流发生器正向偏置。 第一晶体管具有耦合到第一恒流源的第二电极和信号输出的集电极。 第二晶体管具有耦合到第一晶体管的发射极的漏极，耦合到参考电压的源极和耦合到信号输入的栅极。 二极管具有耦合到第一晶体管的基极和耦合到恒定电压源的阴极的阳极。 通过二极管的电流导致第二晶体管的漏 - 源电压恒定。 结果，跨导电路操作被线性化，并且由于第二晶体管中的漏极 - 源极电压变化引起的失真减小。

公开(公告)号：US09171571B2

公开(公告)日：2015-10-27

申请号：US11711479

申请日：2007-02-26

Applicant: Hakan Ozdemir ,  Jonathan James Ashley

Inventor： Hakan Ozdemir ,  Jonathan James Ashley

IPC: G11B20/10 ,  G11B20/18

CPC classification number: G11B20/10009 ,  G11B20/10027 ,  G11B20/10046 ,  G11B20/10222 ,  G11B20/10296 ,  G11B20/10481 ,  G11B20/1876

Abstract: An embodiment of a read channel includes a filter, an interpolator, a recovery circuit, an error detector, a reverse interpolator, and a filter calibrator. The filter is operable to receive a raw sample of a signal and a coefficient-correction value, generate a filtered sample from the raw sample and a pre-established coefficient, and change the coefficient in response to the coefficient-correction value. The interpolator is operable to interpolate the filtered sample, and the recovery circuit is operable to generate a data symbol from the interpolated sample. The error detector is operable to generate an ideal sample from the data symbol and to generate a difference between the ideal sample and the interpolated sample, and the reverse interpolator is operable to reverse interpolate the difference. The filter calibrator is operable to receive the raw sample and to generate the coefficient-correction value from the raw sample and the reverse-interpolated difference.

Abstract translation: 读通道的实施例包括滤波器，内插器，恢复电路，误差检测器，反向内插器和滤波器校准器。 滤波器可操作以接收信号的原始样本和系数校正值，从原始样本生成滤波后的样本和预先建立的系数，并响应于系数校正值改变系数。 内插器可操作地内插经滤波的样本，并且恢复电路可操作以从内插样本生成数据符号。 误差检测器可操作以从数据符号产生理想的采样，并产生理想采样与内插采样之间的差值，并且反向内插器可操作以反向内插差值。 过滤器校准器可操作以接收原始样品并从原始样品和反向插值差产生系数校正值。

公开(公告)号：US20100165811A1

公开(公告)日：2010-07-01

申请号：US12505822

申请日：2009-07-20

Applicant: Frederic BONVIN

Inventor： Frederic BONVIN

IPC: G11B19/04

CPC classification number: G11B19/047 ,  G11B5/54 ,  G11B21/12

Abstract: An embodiment of a circuit for maintaining voltage at a voltage bus after a power loss in a hard disk drive system. HDD systems may suddenly lose power and specific tasks, such as parking the read/write head and storing state data may be accomplished using a power generated from back EMF of a motor that is still turning. During the power loss sequence, a drive controller may drive a power chipset to regulate the voltage at a voltage bus so as to conserve power as much as possible. In this manner, the drive circuit may regulate the voltage via a drive algorithm to be just above a threshold voltage (typically 4.4 V) while the HDD system is storing state data, but apply other algorithm for other situations, such as parking the read/write head. Various drive algorithms may be tailored to provide a specific sequence of voltage bus regulation techniques suited to specific applications.

Abstract translation: 用于在硬盘驱动器系统中的功率损耗之后维持电压总线处的电压的电路的实施例。 HDD系统可能突然失去功率，并且可以使用从仍然转动的电动机的反电动势产生的功率来实现诸如停止读/写头和存储状态数据的特定任务。 在断电顺序期间，驱动控制器可以驱动电源芯片组来调节电压总线上的电压，以尽可能地节省功率。 以这种方式，驱动电路可以通过驱动算法将电压调节为刚刚高于阈值电压（通常为4.4V），而HDD系统正在存储状态数据，但是对其他情况应用其他算法，例如停止读/ 写头 可以调整各种驱动算法以提供适合特定应用的电压总线调节技术的特定顺序。