摘要:
An address associated with a failure in a programmable controller is provided, for reading out an operating state of each element of a sequence circuit. The address and a logic level thereof are stored in an address setting table (TA). The logic level is compared with a logic level of an actual signal stored in a signal update storage table (TB), and a difference therebetween is detected by a signal update detecting means (2). Every time a difference is detected, a signal update writing means (3) writes the address and the logic level of the actual signal into the signal update storage table (TB). The storage contents of the signal update storage table (TB) are displayed on a display means, thereby allowing an operator to check for the cause of the failure.
摘要:
A programmable logic controller executes an SFC program including a plurality of blocks, each including a step indicating an operation output and a transition indicating a transition condition. The programmable logic controller includes an SFC device data collecting unit for collecting device data of a device included in an active step for each scan at the time when the SFC program is executed, an SFC device data storing unit for storing the data collected by the SFC device data collecting unit and an SFC device data outputting unit for outputting the data stored in the SFC device data storing unit to a memory card as a file for each of the steps or the blocks.
摘要:
A task executed on a multi-tasking industrial controller is employed to monitor data exchanged between a control program (executed as a second task on the industrial controller) and the controlled process. The monitoring task, which may be invoked on a periodic basis, reads designated data, compares it to its last value and if it changes, stores the value in a buffer. A separate program reads this buffer and displays relevant information to the user minimizing degradation in the performance of the control program and eliminating the possibility of corruption of the control program as would be required for the introduction of special memory trapping instructions into the control program.
摘要:
An industrial controller executing a graphical language employs a comparator circuit for monitoring the address locations of memory used to store the control program and its data. A cursor positioned on a graphics representation of the program is used to identify a particular graphical element to be monitored and the address of the starting instruction for that element is loaded into the comparator. An interrupt generated by the comparator causes the generation of a histogram listing the particular rungs name and the times at which it has been executed, useful for verifying and monitoring the operation of a control program. A snapshot of data values used by the element of the program at the time of its execution may also be stored to verify the condition under which the element executes.
摘要:
Not any special display is required to provide a monitor displaying of I/O data and timer/counter data during operation of programmable controller. Instead, the display of program console will be utilized to display instruction codes and addresses or error messages in characters. Multiple number of sets, in which the numbers of either I/O data or timer/counter data which optionally specified with numbers, are displayed simultaneously on the character display of the program console.
摘要:
A programmable controller which executes instructions stored in a user program memory to thereby effect predetermined system control. The programmable controller includes a mode designation section for designating a trace trigger mode, an origin instruction input section for inputting an instruction which forms an origin of the trace trigger, an origin instruction memory section for storing the origin instruction inputted from the origin instruction input section, an instruction extraction section for receiving the designation of the trace trigger mode to extract the instruction in coincidence with the origin instruction stored in the origin instruction memory section out of a group of instructions subjected to execution and processing by the instruction execution section, a trace information extraction section for extracting trace information whose reference is the instruction extracted by the instruction extraction section out of a group of instructions subjected to execution and processing by the instruction execution section, a trace information memory section for storing the trace information, and a display section for displaying the trace information stored in the trace information memory section.
摘要:
A sequence display apparatus including a sequence control circuit, a cathode ray tube control device and a sequence display control device is disclosed in which a keyboard included in the sequence display control device is provided with logical function specifying keys for specifying one of a plurality of logical functions corresponding to such logical circuits as AND, OR and flip-flop circuits and a timer and with keys for inputting the names of input signals and the name of an output signal. One logic function, all of the names of the input signals and the name of the output signal are inputted as one set by the key-in operation, each of a group of command codes which are determined by the kind of logical function and the number of the names of input signals, is added to a corresponding one of the names of the input signals and the name of the output signal which have been inputted, to compose a logical operation program. The names of input signals are collectively displayed at a left end part of the display surface of a cathode ray tube, a position on the display surface for displaying the logic symbol is determined in accordance with the number of input signals, and the arrangement of a line for connecting each of the names of the input signals and the logic symbol is determined on the basis of the state of the display at each of the picture elements forming the display surface.