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    STRUCTURE FOR INTERCONNECT PARASITIC EXTRACTION
    1.
    发明申请
    STRUCTURE FOR INTERCONNECT PARASITIC EXTRACTION 有权
    用于互连离散提取的结构

    公开(公告)号：US20170053936A1

    公开(公告)日：2017-02-23

    申请号：US15241108

    申请日：2016-08-19

    申请人： Xingwei Peng ,  Wei Wang

    发明人： Xingwei Peng ,  Wei Wang

    IPC分类号： H01L27/118

    CPC分类号： H01L27/11807 ,  H01L22/34 ,  H01L27/092 ,  H01L27/11582 ,  H01L28/00 ,  H01L2027/11825 ,  H01L2027/1187 ,  H01L2027/11875 ,  H01L2027/11881

    摘要： A structure for extracting interconnect parasitic in a ring oscillator is disclosed. The ring oscillator comprises multiple logical units connected in head to tail series. The structure comprises parasitic resistance sub-structures and/or parasitic capacitance sub-structures each connected to a corresponding logical unit. The structure can be used to determine errors in extracting parasitic resistance of polysilicon interconnects and metal interconnects, and/or errors in extracting parasitic capacitance between the polysilicon interconnects and between the metal interconnects. Therefore, the parasitic extraction error can be calibrated accordingly to obtain more precise circuit simulation results and more accurate device model and BEOL model.

    摘要翻译： 公开了一种用于提取在环形振荡器中寄生的互连的结构。 环形振荡器包括从头到尾串联连接的多个逻辑单元。 该结构包括各自连接到对应的逻辑单元的寄生电阻子结构和/或寄生电容子结构。 该结构可用于确定提取多晶硅互连和金属互连的寄生电阻的误差，和/或提取多晶硅互连之间和金属互连之间的寄生电容的误差。 因此，可以相应地校准寄生提取误差，以获得更精确的电路仿真结果和更精确的器件模型和BEOL模型。