公开(公告)号：US11676928B2

公开(公告)日：2023-06-13

申请号：US17396346

申请日：2021-08-06

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Romain Coffy ,  Patrick Laurent ,  Laurent Schwartz

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L24/24 ,  H01L21/56 ,  H01L23/3185 ,  H01L24/05 ,  H01L24/16 ,  H01L24/73 ,  H01L24/82 ,  H01L2224/0233 ,  H01L2224/02315 ,  H01L2224/02381 ,  H01L2224/16145 ,  H01L2224/24011 ,  H01L2224/24105 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/24226 ,  H01L2224/73227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82048 ,  H01L2224/82108

Abstract: An integrated circuit chip includes a front face having an electrical connection pad. An overmolded encapsulation block encapsulates the integrated circuit chip and includes a front layer at least partially covering a front face of the integrated circuit chip. A through-hole the encapsulation block is located above the electrical connection pad of the integrated circuit chip. A wall of the through-hole is covered with an inner metal layer that is joined to the front pad of the integrated circuit chip. A front metal layer covers a local zone of the front face of the front layer, with the front metal layer being joined to the inner metal layer to form an electrical connection. The inner metal layer and the front metal layer are attached or anchored to activated additive particles that are included in the material of the encapsulation block.