公开(公告)号：US07564308B1

公开(公告)日：2009-07-21

申请号：US11818398

申请日：2007-06-13

Applicant: Saurabh Vats

Inventor： Saurabh Vats

IPC: H03F3/45

CPC classification number: H03F3/45134 ,  H03F3/45121 ,  H03F3/45506 ,  H03F2203/45406 ,  H03F2203/45424 ,  H03F2203/45434 ,  H03F2203/45652 ,  H03F2203/45722

Abstract: An operational amplifier in accordance with one embodiment of the invention includes folded cascode transistors and a self-biased common-mode feedback circuit coupled to the folded cascode transistors. The operational amplifier can include an output stage coupled to the self-biased common-mode feedback circuit and the folded cascode transistors.

Abstract translation: 根据本发明的一个实施例的运算放大器包括折叠共源共栅晶体管和耦合到折叠共源共栅晶体管的自偏压共模反馈电路。 运算放大器可以包括耦合到自偏置共模反馈电路和折叠共源共栅晶体管的输出级。

公开(公告)号：US09071205B2

公开(公告)日：2015-06-30

申请号：US13912629

申请日：2013-06-07

Applicant: ANALOG DEVICES, INC.

Inventor： Daniel Rey-Losada ,  Corey Petersen

IPC: H03F3/18 ,  H03F3/26

CPC classification number: H03F3/265 ,  H03F3/3022 ,  H03F3/45134 ,  H03F3/45291

Abstract: An amplifier with a single-input class-AB output stage comprises an input stage providing a signal to an output stage. The output stage comprises a current-splitting stage having a bias current and providing at least two intermediate output currents, and a drive stage receiving the two intermediate output currents and driving an output signal having a positive side and a negative side.

Abstract translation: 具有单输入AB类输出级的放大器包括向输出级提供信号的输入级。 输出级包括具有偏置电流并提供至少两个中间输出电流的分流级，以及接收两个中间输出电流并驱动具有正侧和负侧的输出信号的驱动级。

公开(公告)号：US20150035813A1

公开(公告)日：2015-02-05

申请号：US14070515

申请日：2013-11-02

Applicant: INTEGRATED SOLUTIONS TECHNOLOGY INC.

Inventor： CHIA CHENG LEI

IPC: G09G3/32 ,  H03F3/45

CPC classification number: G09G3/3208 ,  G09G2310/027 ,  G09G2310/0291 ,  H03F3/393 ,  H03F3/45134 ,  H03F2203/45112 ,  H03F2203/45726

Abstract: A drive circuit of an organic light emitting display and an offset voltage adjustment unit thereof are provided. The offset voltage adjustment unit can be used in an operational amplifier of the drive circuit having a differential input stage, a bias stage, and an output stage. The offset voltage adjustment unit coupled between the bias stage and a ground including a resistor string and a plurality of latch units. The resistor string has a first-end, a second-end, and a plurality of resistors series-connected between the first-end and the second-end forming a plurality of junctions. The latch units are coupled between the junctions and the ground, respectively. The latch units are sequentially conducted to adjust a bias current of the bias stage according to a control signal. The latch units enter a latch state upon receiving a latch signal to calibrate an output offset voltage of the operational amplifier.

Abstract translation: 提供有机发光显示器的驱动电路及其偏移电压调整单元。 偏移电压调整单元可以用在具有差分输入级，偏置级和输出级的驱动电路的运算放大器中。 偏置电压调整单元耦合在偏置级与包括电阻串和多个锁存单元的接地之间。 电阻串具有第一端，第二端和串联连接在第一端和第二端之间的多个电阻器，形成多个结。 闩锁单元分别连接在接头和接地之间。 根据控制信号顺序导通锁存单元以调整偏置级的偏置电流。 锁存单元在接收到锁存信号时进入锁存状态，以校准运算放大器的输出失调电压。

公开(公告)号：US20140361833A1

公开(公告)日：2014-12-11

申请号：US13912629

申请日：2013-06-07

Applicant: Analog Devices, Inc.

Inventor： Daniel Rey-Losada ,  Corey Petersen

IPC: H03F3/26

CPC classification number: H03F3/265 ,  H03F3/3022 ,  H03F3/45134 ,  H03F3/45291

Abstract: An amplifier with a single-input class-AB output stage comprises an input stage providing a signal to an output stage. The output stage comprises a current-splitting stage having a bias current and providing at least two intermediate output currents, and a drive stage receiving the two intermediate output currents and driving an output signal having a positive side and a negative side.

Abstract translation: 具有单输入AB类输出级的放大器包括向输出级提供信号的输入级。 输出级包括具有偏置电流并提供至少两个中间输出电流的分流级，以及接收两个中间输出电流并驱动具有正侧和负侧的输出信号的驱动级。

公开(公告)号：US06249153B1

公开(公告)日：2001-06-19

申请号：US09318399

申请日：1999-05-25

Applicant: Farhood Moraveji

Inventor： Farhood Moraveji

IPC: H03F345

CPC classification number: H03F3/45125 ,  H03F3/45098 ,  H03F3/45134 ,  H03F3/4517 ,  H03F3/45197 ,  H03F3/45224 ,  H03F3/45233 ,  H03F3/45269 ,  H03F2203/45248 ,  H03F2203/45454 ,  H03F2203/45458 ,  H03F2203/45648 ,  H03F2203/45682

Abstract: A differential pair includes a first and second transistors each having a control terminal coupled to a first input voltage, and a third and fourth transistors each having a control terminal coupled to a second input voltage. The first, second, third, and fourth transistors each has a first current handling terminal coupled to a reference voltage. The first and second transistors each has a second current handling terminal coupled to a first current mirror. The third and fourth transistors each has a second current handling terminal coupled to a second current mirror. A resistor is coupled between the second current handling terminals of the second and third transistors. The differential pair is capable of attaining a high slew rate and a possible common mode input voltage of ground while drawing only a small quiescent current.

Abstract translation: 差分对包括每个具有耦合到第一输入电压的控制端的第一和第二晶体管，以及分别具有耦合到第二输入电压的控制端的第三和第四晶体管。 第一，第二，第三和第四晶体管各自具有耦合到参考电压的第一电流处理端子。 第一和第二晶体管各自具有耦合到第一电流镜的第二电流处理终端。 第三和第四晶体管各自具有耦合到第二电流镜的第二电流处理终端。 电阻器耦合在第二和第三晶体管的第二电流处理端子之间。 差分对能够获得高转换速率和可能的共模输入电压，同时仅获得较小的静态电流。