Incremental gain amplifier
    2.
    发明授权
    Incremental gain amplifier 有权
    增量增益放大器

    公开(公告)号:US08854133B2

    公开(公告)日:2014-10-07

    申请号:US13750502

    申请日:2013-01-25

    摘要: An amplifier includes an amplifier section having selectable signal paths to provide discrete gain settings, and logic to incrementally select the signal paths. The logic may be configured to increment the gain in response to digital gain control signals or an analog gain control signal. Another amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.

    摘要翻译: 放大器包括具有可选择的信号路径以提供离散增益设置的放大器部分和用于递增地选择信号路径的逻辑。 逻辑可以被配置为响应于数字增益控制信号或模拟增益控制信号来增加增益。 另一个放大器具有一个具有一个或多个输入单元的输入部分和一个具有一个或多个输出单元的输出部分。 输入部分或输出部分包括至少两个可以被选择以提供离散增益设置的单元。 环路放大器被配置成与输入部分的反馈装置。 输入和输出部分可以具有多个可选择的单元以提供粗略和细微的增益步骤。 环路放大器的增益可以与输入部分的增益协调,以提供恒定的带宽操作。

    Common-mode step response for autozero amplifiers
    3.
    发明授权
    Common-mode step response for autozero amplifiers 有权
    共模放大器的共模阶跃响应

    公开(公告)号:US08624668B2

    公开(公告)日:2014-01-07

    申请号:US13325750

    申请日:2011-12-14

    IPC分类号: H03F1/02

    摘要: An auto-zero amplifier includes a main amplifier for amplifying an input signal; the main amplifier receives an offset-correction signal for cancelling an offset at a first common-mode level of the input signal. At the first common-mode level, the offset-correction signal is based on a first value stored using a first offset-storage element. When a change is detected in the input common-mode from the first level to a second level, the first offset-storage element is switched out and a second offset-storage element, having a second value based on the second common-mode level, is switched in.

    摘要翻译: 自动调零放大器包括用于放大输入信号的主放大器; 主放大器接收用于抵消输入信号的第一共模电平处的偏移的偏移校正信号。 在第一共模电平下,偏移校正信号基于使用第一偏移存储元件存储的第一值。 当在从第一级到第二级的输入共模中检测到改变时,第一偏移存储元件被切换,并且具有基于第二共模电平的第二值的第二偏移存储元件, 被切换

    Tunable linear operational transconductance amplifier
    4.
    发明授权
    Tunable linear operational transconductance amplifier 有权
    可调线性运算跨导放大器

    公开(公告)号:US07948314B2

    公开(公告)日:2011-05-24

    申请号:US12473131

    申请日:2009-05-27

    IPC分类号: H03F3/45

    摘要: A tunable, linear operational transconductance amplifier includes a differential voltage to current conversion unit adapted to generate first and second output signals at respective first and second output nodes responsive to first and second differential input signals. A first current amplification unit is adapted to generate a third output signal responsive to the first output signal and first and second control signals. A second current amplification unit is adapted to generate a fourth output signal responsive to the second output signal and the first and second control signals.

    摘要翻译: 可调谐线性运算跨导放大器包括差分电压到电流转换单元,其适于响应于第一和第二差分输入信号在相应的第一和第二输出节点产生第一和第二输出信号。 第一电流放大单元适于响应于第一输出信号和第一和第二控制信号产生第三输出信号。 第二电流放大单元适于响应于第二输出信号和第一和第二控制信号产生第四输出信号。

    RECEIVER
    5.
    发明申请
    RECEIVER 有权
    接收器

    公开(公告)号:US20110085621A1

    公开(公告)日:2011-04-14

    申请号:US12972209

    申请日:2010-12-17

    申请人: Takuji YAMAMOTO

    发明人: Takuji YAMAMOTO

    IPC分类号: H04L25/06

    摘要: A receiver includes: a first amplifier for amplifying an input signal and outputting an output signal; a clock generator for generating a clock signal corresponding to a period of the output signal; a judger for outputting a first logical value or a second logical value in accordance with a phase lead or phase lag which has been occurred at a crossing point of the positive-phase signal and the negative-phase signal of the output signal upon rising or falling the clock signal; a detector for outputting a difference value between a time for which the judgment signal has the first logical value and a time for which the judgment signal has the second logical value; and an adjustor for adjusting reference voltages of a positive-phase signal and a negative-phase signal of the input signal in accordance with the difference value output from the detector.

    摘要翻译: 接收机包括:第一放大器,用于放大输入信号并输出​​输出信号; 时钟发生器,用于产生对应于输出信号周期的时钟信号; 用于根据在上升或下降时输出信号的正相信号和负相位信号的交叉点发生的相位超前或相位滞后来输出第一逻辑值或第二逻辑值的判断器 时钟信号; 检测器,用于输出判断信号具有第一逻辑值的时间与判断信号具有第二逻辑值的时间之间的差值; 以及调整器,用于根据从检测器输出的差值调整输入信号的正相信号和负相位信号的参考电压。

    RAIL-TO-RAIL CLASS AB AMPLIFIER
    7.
    发明申请
    RAIL-TO-RAIL CLASS AB AMPLIFIER 审中-公开
    轨道到轨道AB放大器

    公开(公告)号:US20080036538A1

    公开(公告)日:2008-02-14

    申请号:US11776209

    申请日:2007-07-11

    申请人: Myung-Jin Lee

    发明人: Myung-Jin Lee

    IPC分类号: H03F3/30

    摘要: A rail-to-rail class AB amplifier includes an input circuit for converting a voltage difference between a first input signal and a second input signal into respective currents, a first current adder circuit for adding a drain current of a first input NMOS transistor and a drain current of a second input NMOS transistor, a second current adder circuit for adding a drain current of a first input PMOS transistor and a drain current of a second input PMOS transistor, a floating current source for controlling a bias current of the first current adder circuit and the second current adder circuit, a control circuit for controlling a voltage level of the drain terminal of a second cascode PMOS transistor and a second cascode NMOS transistor, and an output circuit coupled to the drain terminals of the second cascode PMOS transistor and the second NMOS transistor.

    摘要翻译: 轨到轨AB类放大器包括:输入电路,用于将第一输入信号和第二输入信号之间的电压差转换成各自的电流;第一电流加法器电路,用于将第一输入NMOS晶体管的漏极电流和 第二输入NMOS晶体管的漏极电流,用于将第一输入PMOS晶体管的漏极电流和第二输入PMOS晶体管的漏极电流相加的第二电流加法器电路,用于控制第一电流加法器的偏置电流的浮动电流源 电路和第二电流加法器电路,用于控制第二共源共栅PMOS晶体管和第二共源共栅NMOS晶体管的漏极端子的电压电平的控制电路,以及耦合到第二共源共栅PMOS晶体管的漏极端子和 第二NMOS晶体管。

    Variable-gain amplifier having error amplifier with constant loop gain
    8.
    发明授权
    Variable-gain amplifier having error amplifier with constant loop gain 有权
    具有恒定环路增益的误差放大器的可变增益放大器

    公开(公告)号:US07190227B2

    公开(公告)日:2007-03-13

    申请号:US11117071

    申请日:2005-04-27

    申请人: Barrie Gilbert

    发明人: Barrie Gilbert

    IPC分类号: H03F3/45

    摘要: A translinear amplifier is disclosed. A loop amplifier drives the bases of the input and output transistor pairs from the differential collector voltage of the input pair. The loop amplifier contains a third differential pair (a gain pair). The tail current of the gain pair is inversely related to the tail current of the input pair, such that loop amplifier gain remains stable when the transconductance of the input pair changes (due, e.g., to input gain changes). In one embodiment, a linear-in-dB interface is provided that adjusts input pair tail current exponentially (and gain pair tail current exponentially and inversely) to linear voltage changes at a gain input.

    摘要翻译: 公开了一种跨线性放大器。 环路放大器从输入对的差分集电极电压驱动输入和输出晶体管对的基极。 环路放大器包含第三差分对(增益对)。 增益对的尾部电流与输入对的尾部电流成反比,使得当输入对的跨导改变(由于例如输入增益变化)时,环路放大器增益保持稳定。 在一个实施例中,提供了在增益输入处将输入对尾部电流指数地(和增益对尾部电流指数地和相反地)调整为线性电压变化的线性dB接口。

    Differential amplifying circuit
    9.
    发明授权
    Differential amplifying circuit 有权
    差分放大电路

    公开(公告)号:US07170348B2

    公开(公告)日:2007-01-30

    申请号:US10975935

    申请日:2004-10-29

    IPC分类号: H03F3/45

    摘要: A differential amplifier circuit includes a first differential transistor pair, a second differential transistor pair, an adder section and an amplifying unit. The first differential transistor pair receives first and second input signals and an output signal as a third input signal, and the second differential transistor pair receives the first and second input signals and the output signal as a fourth input signal. The adder section adds first output signals from the first differential transistor pair and second output signals from the second differential transistor pair, and the amplifying unit amplifies an addition resultant signal from the adder section to output to the first and second differential transistor pairs.

    摘要翻译: 差分放大器电路包括第一差分晶体管对,第二差分晶体管对,加法器部分和放大单元。 第一差分晶体管对接收第一和第二输入信号以及输出信号作为第三输入信号,第二差分晶体管对将第一和第二输入信号和输出信号作为第四输入信号接收。 加法器部分将来自第一差分晶体管对的第一输出信号和来自第二差分晶体管对的第二输出信号相加,并且放大单元放大来自加法器部分的相加结果信号以输出到第一和第二差分晶体管对。

    Differential amplifier and data driver for display

    公开(公告)号:US20060238242A1

    公开(公告)日:2006-10-26

    申请号:US11410242

    申请日:2006-04-25

    申请人: Hiroshi Tsuchi

    发明人: Hiroshi Tsuchi

    IPC分类号: H03F1/14 H03F3/45

    摘要: Disclosed is a differential amplifier comprising first and second terminals for receiving signals; a third terminal for outputting a signal; first and second differential pairs, each having an input pair and an output pair, said first and second differential pairs being supplied with currents from current sources associated therewith, respectively; a load circuit connected to output pairs of said first and second differential pairs; an amplifier stage for receiving, as an input, a signal of at least one connection node of a connection node pair of said load circuit and output pairs of said first and second differential pairs, said amplifier stage having an output connected to said third terminal; and a connection switching circuit for controlling the switching between a first connection state in which first and second inputs of the input pair of said first differential pair are connected to said first terminal and said third terminal, respectively, and in which first and second inputs of the input pair of said second differential pair are connected to said second terminal and said third terminal, respectively, and a second connection state in which the first and second inputs of the input pair of said first differential pair are connected to said third terminal and said second terminal, respectively, and in which the first and second inputs of the input pair of said second differential pair are connected to said third terminal and said first terminal, respectively.