TELESCOPIC AMPLIFIER WITH IMPROVED COMMON MODE SETTLING
    1.
    发明申请
    TELESCOPIC AMPLIFIER WITH IMPROVED COMMON MODE SETTLING 审中-公开
    具有改进的共同模式设置的电视放大器

    公开(公告)号:US20160380644A1

    公开(公告)日:2016-12-29

    申请号:US15258237

    申请日:2016-09-07

    发明人: Roswald Francis

    IPC分类号: H03M1/12 H03F3/45

    摘要: Telescopic amplifier circuits are disclosed. In an embodiment, a telescopic amplifier includes an input stage for receiving differential input signals, an output stage for outputting differential output signals at the drains of a first output transistor and a second output transistor, a tail current transistor coupled to sources of a first input transistor and a second input transistor, a common mode feedback circuit coupled to the differential output signals and outputting a common mode output signal, and a circuit element coupled between the common mode output signal and a gate of the tail current transistor. In an embodiment the circuit element is a resistor. In another embodiment the circuit element is a source follower transistor. In additional embodiments a phase margin of the common mode feedback open loop gain of the amplifier is determined by the value of the resistor. Additional embodiments are disclosed.

    摘要翻译: 公开了伸缩放大器电路。 在一个实施例中,伸缩放大器包括用于接收差分输入信号的输入级,用于在第一输出晶体管和第二输出晶体管的漏极处输出差分输出信号的输出级,耦合到第一输入端的源极的尾电流晶体管 晶体管和第二输入晶体管,耦合到差分输出信号并输出​​共模输出信号的共模反馈电路以及耦合在共模输出信号和尾电流晶体管的栅极之间的电路元件。 在一个实施例中,电路元件是电阻器。 在另一个实施例中,电路元件是源极跟随器晶体管。 在另外的实施例中,放大器的共模反馈开环增益的相位裕度由电阻器的值确定。 公开了另外的实施例。

    Telescopic Amplifier with Improved Common Mode Settling
    2.
    发明申请
    Telescopic Amplifier with Improved Common Mode Settling 审中-公开
    具有改进的共模稳定的伸缩放大器

    公开(公告)号:US20150061767A1

    公开(公告)日:2015-03-05

    申请号:US14470682

    申请日:2014-08-27

    发明人: Roswald Francis

    IPC分类号: H03F3/45

    摘要: Telescopic amplifier circuits are disclosed. In an embodiment, a telescopic amplifier includes an input stage for receiving differential input signals, an output stage for outputting differential output signals at the drains of a first output transistor and a second output transistor, a tail current transistor coupled to sources of a first input transistor and a second input transistor, a common mode feedback circuit coupled to the differential output signals and outputting a common mode output signal, and a circuit element coupled between the common mode output signal and a gate of the tail current transistor. In an embodiment the circuit element is a resistor. In another embodiment the circuit element is a source follower transistor. In additional embodiments a phase margin of the common mode feedback open loop gain of the amplifier is determined by the value of the resistor. Additional embodiments are disclosed.

    摘要翻译: 公开了伸缩放大器电路。 在一个实施例中,伸缩放大器包括用于接收差分输入信号的输入级,用于在第一输出晶体管和第二输出晶体管的漏极处输出差分输出信号的输出级,耦合到第一输入端的源极的尾电流晶体管 晶体管和第二输入晶体管,耦合到差分输出信号并输出​​共模输出信号的共模反馈电路,以及耦合在共模输出信号和尾电流晶体管的栅极之间的电路元件。 在一个实施例中,电路元件是电阻器。 在另一个实施例中,电路元件是源极跟随器晶体管。 在另外的实施例中,放大器的共模反馈开环增益的相位裕度由电阻器的值确定。 公开了另外的实施例。

    Amplifier common-mode control methods
    3.
    发明授权
    Amplifier common-mode control methods 有权
    放大器共模控制方式

    公开(公告)号:US08552801B2

    公开(公告)日:2013-10-08

    申请号:US12930757

    申请日:2011-01-14

    申请人: Andrew Myles

    发明人: Andrew Myles

    IPC分类号: H03F3/45

    摘要: Systems and methods for providing a fully differential amplifier performing common-mode voltage control having reduced area and power requirements are disclosed. The amplifier disclosed comprises an additional input stage at the amplifier input which senses the common mode voltage of the amplifier's inputs and applies internal feedback control to adjust the output common-mode voltage until the input common-mode voltage matches a target voltage and thereby indirectly set the output common-mode voltage. Furthermore the internal common-mode control can be implemented in such a manner as to provide a feed-forward transconductance function in addition to common-mode control if desired. Moreover it is possible to use feedback from other amplifier stages in an amplifier chain to implement common-mode feedback.

    摘要翻译: 公开了提供具有减小面积和功率要求的共模电压控制的全差分放大器的系统和方法。 所公开的放大器包括在放大器输入处的附加输入级,其感测放大器输入的共模电压,并且施加内部反馈控制以调整输出共模电压,直到输入共模电压与目标电压相匹配,从而间接设置 输出共模电压。 此外,如果需要,可以以除了共模控制之外提供前馈跨导功能的方式来实现内部共模控制。 此外,可以使用放大器链中其他放大器级的反馈来实现共模反馈。

    OPERATIONAL AMPLIFIER CIRCUIT
    4.
    发明申请
    OPERATIONAL AMPLIFIER CIRCUIT 有权
    操作放大器电路

    公开(公告)号:US20120182071A1

    公开(公告)日:2012-07-19

    申请号:US13349861

    申请日:2012-01-13

    申请人: Tatsuya Takei

    发明人: Tatsuya Takei

    IPC分类号: H03F3/45

    摘要: An operational amplifier circuit may include a fully differential amplifier circuit that has a common mode feedback, the fully differential amplifier circuit performing operational amplification using a common mode base voltage as a center, a common mode detection circuit that detects a common mode output voltage of the fully differential amplifier circuit, a sample and hold circuit that performs sample and hold of an output of the common mode detection circuit, an operational circuit that detects a deviation between the output of the sample and hold circuit and a common mode reference voltage, the operational circuit outputting a voltage corresponding to the detected deviation and the common mode reference voltage, and a switching circuit that selects the common mode reference voltage or an output of the operational circuit to output the common mode reference voltage or the output as the common mode base voltage.

    摘要翻译: 运算放大器电路可以包括具有共模反馈的全差分放大器电路,全差分放大器电路使用共模基极电压作为中心进行运算放大,共模检测电路检测共模输出电压 全差分放大器电路,对共模检测电路的输出进行采样和保持的采样和保持电路,检测采样和保持电路的输出与共模参考电压之间的偏差的运算电路, 输出对应于检测到的偏差和共模参考电压的电压的电路,以及选择共模参考电压的开关电路或输出共模参考电压或输出作为共模基极电压的运算电路的输出 。

    Fully differential input buffer with wide signal swing range
    5.
    发明申请
    Fully differential input buffer with wide signal swing range 失效
    具有宽信号摆幅范围的全差分输入缓冲器

    公开(公告)号:US20050162190A1

    公开(公告)日:2005-07-28

    申请号:US10761276

    申请日:2004-01-22

    申请人: Hung-Sung Li

    发明人: Hung-Sung Li

    摘要: A squeezable tail current source for use in a differential operational amplifier is disclosed that regulates the current through a main input differential pair while preventing output distortion and allowing high linearity. The squeezable tail current source includes a first transistor pair that replicates a main input transistor pair, wherein both the first transistor pair and the main input transistor pair receive a common voltage input at their respective gates. The squeezable tail current source also includes a second transistor pair, a bias transistor, a first current source, a folding transistor, and a second current source that biases the folding transistor. These components are configured such that current through the main input transistor pair is maintained as the voltage input varies. In addition, the second current source and the folding transistor isolate the bias transistor and the second transistor pair from a drain voltage of the first transistor pair, thereby causing the first transistor pair and the main input transistor pair to have a common drain bias, which prevents output distortion and allows high linearity to be achieved.

    摘要翻译: 公开了一种用于差分运算放大器的可压缩尾电流源,其调节通过主输入差分对的电流,同时防止输出失真并允许高线性度。 可压缩尾电流源包括复制主输入晶体管对的第一晶体管对,其中第一晶体管对和主输入晶体管对均在其各自的栅极处接收公共电压输入。 可挤压尾电流源还包括偏置折叠晶体管的第二晶体管对,偏置晶体管,第一电流源,折叠晶体管和第二电流源。 这些部件配置成使得当电压输入变化时,通过主输入晶体管对的电流被维持。 此外,第二电流源和折叠晶体管将偏置晶体管和第二晶体管对与第一晶体管对的漏极电压隔离,从而使第一晶体管对和主输入晶体管对具有共同的漏极偏置,其中 防止输出失真并允许实现高线性度。

    Rail-to-rail input stage
    6.
    发明授权
    Rail-to-rail input stage 有权
    轨到轨输入级

    公开(公告)号:US06249184B1

    公开(公告)日:2001-06-19

    申请号:US09452029

    申请日:1999-11-30

    申请人: Marco Corsi

    发明人: Marco Corsi

    IPC分类号: H03F345

    摘要: A rail-to-rail input stage (20) for an operational amplifier having a constant transconductance (Gm) over a common mode range. The input stage has a cross-coupled quad circuit (Q9, Q10, Q15, Q16) having an essentially infinite transconductance, and pair of transistors (Q5, 6) running at the same current as input transistors (Q1, Q2) when active, whereby the pair of transistors (Q5, Q6) establish a constant transconductance of the input stage (20).

    摘要翻译: 一种用于在共模范围内具有恒定跨导(Gm)的运算放大器的轨到轨输入级(20)。 输入级具有具有基本上无限跨导的交叉耦合四电路(Q9,Q10,Q15,Q16)以及当与有源时在与输入晶体管(Q1,Q2)相同的电流下运行的一对晶体管(Q5,6) 由此一对晶体管(Q5,Q6)建立输入级(20)的恒定跨导。

    Low power buffer circuit and method for generating a common-mode output
absent process-induced mismatch error
    7.
    发明授权
    Low power buffer circuit and method for generating a common-mode output absent process-induced mismatch error 失效
    低功耗缓冲电路和用于产生共模输出的方法,不存在过程引起的失配误差

    公开(公告)号:US06107859A

    公开(公告)日:2000-08-22

    申请号:US989707

    申请日:1997-12-12

    申请人: Nathan Y. Moyal

    发明人: Nathan Y. Moyal

    IPC分类号: H03F3/45 H03K19/0185

    摘要: A buffer circuit or output driver can produce a common-mode output and maintain fully differential input signals to the buffer. The common-mode output is derived by shifting the input voltages to the buffer by a threshold amount, averaging the shifted input voltages through a resistor divider, then again-shifting the resulting voltage to an output node of the buffer. The voltages at which the first and second shifts occur are equal but in opposite direction. Accordingly, the output voltage is at a midscale, average or common-mode voltage of the input voltages applied to the buffer. The output voltage has sufficient swing head room and is well suited for low power applications. The buffer circuit utilizes relatively few transistors and only two major current paths from the power supply to ground. Accordingly, the buffer consumes relatively low amounts of power. All of the critical transistors within the buffer are of the same doping type, concentration and implant profile to assure the upward and downward shifts are substantially equal based on the threshold voltages of the critical transistors.

    摘要翻译: 缓冲电路或输出驱动器可以产生共模输出,并将完全差分输入信号保持到缓冲器。 通过将输入电压移动到缓冲器一个阈值量,通过电阻分压器对移位的输入电压进行平均,然后将所得到的电压再次移位到缓冲器的输出节点,得到共模输出。 发生第一和第二偏移的电压相等但相反方向。 因此,输出电压处于施加到缓冲器的输入电压的中等平均或共模电压。 输出电压具有足够的摆动头部空间,非常适合低功率应用。 缓冲电路利用相对较少的晶体管和仅从电源到地的两条主要电流路径。 因此,缓冲器消耗相对较低的功率。 缓冲器内的所有关键晶体管具有相同的掺杂类型,浓度和注入分布,以确保基于临界晶体管的阈值电压的向上和向下移位基本相等。

    Fully differential folded cascode CMOS operational amplifier having
adaptive biasing and common mode feedback circuits
    9.
    发明授权
    Fully differential folded cascode CMOS operational amplifier having adaptive biasing and common mode feedback circuits 失效
    具有自适应偏置和共模反馈电路的全差分折叠共源共栅CMOS运算放大器

    公开(公告)号:US5729178A

    公开(公告)日:1998-03-17

    申请号:US626817

    申请日:1996-04-03

    IPC分类号: H03F3/187 H03F1/02 H03F3/45

    摘要: An adaptive biasing circuit is combined to a fully differential cascode operational amplifier ("OP AMP") to eliminate the effect of a slew rate, thereby increasing the operation speed of the OP AMP while maintaining a high DC voltage gain. A common mode feedback circuit with a large input common mode voltage range is also connected to the OP AMP, thereby maximizing a linear output voltage swing range. The common mode feedback circuit comprises a nMOS input stage differential amplifier and a pMOS input stage differential amplifier which are connected in parallel, and a push-pull CMOS amplifier for converting current outputs from the nMOS and the pMOS input stage differential amplifiers to an output voltage signal. The adaptive bias circuit comprises an operational transconductance amplifier, two current subtractor circuits and four output transistors.

    摘要翻译: 自适应偏置电路组合到全差分共源共栅运算放大器(“OP AMP”)以消除转换速率的影响,从而在保持高直流电压增益的同时增加OP AMP的运行速度。 具有大输入共模电压范围的共模反馈电路也连接到OP AMP,从而最大化线性输出电压摆幅范围。 共模反馈电路包括并联连接的nMOS输入级差分放大器和pMOS输入级差分放大器,以及用于将nMOS和pMOS输入级差分放大器的电流输出转换为输出电压的推挽式CMOS放大器 信号。 自适应偏置电路包括运算跨导放大器,两个电流减法器电路和四个输出晶体管。

    Rail-to-rail CMOS operational amplifier
    10.
    发明授权
    Rail-to-rail CMOS operational amplifier 失效
    轨至轨CMOS运算放大器

    公开(公告)号:US5006817A

    公开(公告)日:1991-04-09

    申请号:US420937

    申请日:1989-10-13

    IPC分类号: H03F3/30 H03F3/45

    摘要: A CMOS operational amplifier comprises an output gain stage including output transistors coupled between the rails so that for a given amount of current, the output transistors have rail-to-rail gate-to-source voltages. The output transistors can be made smaller in size with the output stage being capable of driving a small resistive load with minimal signal distortion.

    摘要翻译: CMOS运算放大器包括输出增益级,其包括耦合在轨道之间的输出晶体管,使得对于给定量的电流,输出晶体管具有轨至轨栅极至源极电压。 输出晶体管的尺寸可以更小,输出级能够以最小的信号失真驱动小的电阻负载。