公开(公告)号：US10063248B2

公开(公告)日：2018-08-28

申请号：US15302482

申请日：2015-03-27

Applicant: ams AG

Inventor： Luigi Di Piro ,  Riccardo Serventi ,  Paolo D'Abramo ,  Edoardo Biagi ,  Luca Fanucci

IPC: H03M1/02 ,  H03M1/46 ,  H03M1/12 ,  H03M1/10

CPC classification number: H03M1/02 ,  H03M1/1023 ,  H03M1/1245 ,  H03M1/46

Abstract: A driver arrangement (10) comprises a digital controller (11) that is configured to receive a digital input signal (SDI) and a driver (12) that comprises a driver input (14) and a driver output (15) and is configured to provide an analog output signal (SANO) at the driver output (15). The driver arrangement (10) comprises a coupling circuit (13) that comprises a digital-to-analog converter (19) and a feedback circuit (24). The digital-to-analog converter (19) comprises a converter input (20) coupled to the digital controller (11) and a converter output (21) coupled to the driver input (14). The feedback circuit (24) is coupled to the driver output (15) and to a feedback input (17) of the digital controller (11).

公开(公告)号：US20150145708A1

公开(公告)日：2015-05-28

申请号：US14462961

申请日：2014-08-19

Applicant: Spreadtrum Communications (Shanghai) Co., Ltd.

Inventor： Jiangang WU ,  Haifeng SHEN ,  Jiaqing WANG

IPC: H03M1/46 ,  H03M1/66

CPC classification number: H03M1/462 ,  H03M1/02

Abstract: A converting circuit and a communication device are provided. The converting circuit includes: a sample hold circuit for receiving an analog signal; a Digital to Analog Converter (DAC); a comparator being connected with an output end of the sample hold circuit and an output end of the DAC; and a control circuit being connected with an output end of the comparator, wherein when the sample hold circuit receives an analog signal, the control circuit controls the sample hold circuit and the comparator to work, controls an output of the DAC based on an output of the comparator, and outputs a corresponding digital signal; and when the control circuit detects a digital signal is input, the control circuit controls the DAC to convert the digital signal into an corresponding analog signal and output the corresponding analog signal. The converting circuit can reduce chip area and chip cost.

Abstract translation: 提供A转换电路和通信装置。 转换电路包括：用于接收模拟信号的采样保持电路; 数模转换器（DAC）; 比较器与采样保持电路的输出端和DAC的输出端相连; 以及与所述比较器的输出端连接的控制电路，其中当所述采样保持电路接收到模拟信号时，所述控制电路控制所述采样保持电路和所述比较器工作，基于所述DAC的输出来控制所述DAC的输出 比较器，并输出相应的数字信号; 并且当控制电路检测到数字信号被输入时，控制电路控制DAC将数字信号转换成相应的模拟信号并输出​​相应的模拟信号。 转换电路可以降低芯片面积和芯片成本。

公开(公告)号：US08963749B2

公开(公告)日：2015-02-24

申请号：US13556371

申请日：2012-07-24

Applicant: Mitsuhiro Washiro

Inventor： Mitsuhiro Washiro

IPC: H03M1/02 ,  G05B19/042

CPC classification number: G05B19/0423 ,  G05B2219/25006 ,  G05B2219/25428 ,  H03M1/02

Abstract: A fieldbus adaptor connected between a fieldbus that handles a digital signal and a field device that handles an analog signal, the fieldbus adaptor comprising a first connection unit detachably connected to the fieldbus, a second connection unit detachably connected to the field device, and a conversion unit provided between the first connection unit and the second connection unit, the conversion unit bidirectionally converting the digital signal handled by the fieldbus and the analog signal handled by the field device.

Abstract translation: 连接在处理数字信号的现场总线和处理模拟信号的现场设备之间的现场总线适配器，所述现场总线适配器包括可拆卸地连接到所述现场总线的第一连接单元，可拆卸地连接到所述现场设备的第二连接单元，以及转换器 设置在第一连接单元和第二连接单元之间的单元，转换单元双向转换由现场总线处理的数字信号和由现场设备处理的模拟信号。

公开(公告)号：US20070296622A1

公开(公告)日：2007-12-27

申请号：US11766687

申请日：2007-06-21

Applicant: Yasumasa Hayakawa ,  Akira Yoshida ,  Taichiro Kawai

Inventor： Yasumasa Hayakawa ,  Akira Yoshida ,  Taichiro Kawai

IPC: H03M1/12

CPC classification number: H03M1/02 ,  H03M1/1225 ,  H03M1/46 ,  H03M1/662

Abstract: A combined AD/DA converting apparatus carrying out AD conversion of an analog input signal to output a converted digital signal or carrying out DA conversion of a digital input signal to output a converted analog signal based on a conversion selection signal for selecting AD conversion or DA conversion comprises an input signal selection circuit configured to select one analog signal out of a plurality of analog input signals to be output based on an input selection signal; an input sample hold circuit configured to sample and hold the analog input signal output from the input signal selection circuit; a DA converter configured to convert a digital signal into an analog signal to be output; a comparator circuit configured to output a comparison signal that indicates a size relation between the analog input signal output from the input sample hold circuit and the analog signal output from the DA converter; a sequential comparison register configured to define sequentially each place of a digital signal stored in the register based on the comparison signal output from the comparison circuit; a selection circuit configured to receive the digital signal stored in the sequential comparison register, the digital input signal, and the conversion selection signal, the selection circuit being configured to output the digital signal stored in the sequential comparison register to the DA converter when the conversion selection signal indicates AD conversion, and to output the digital input signal to the DA converter when the conversion selection signal indicates DA conversion; and a controlling unit configured to output the input selection signal when the conversion selection signal indicates DA conversion.

Abstract translation: 一种组合的AD / DA转换装置，其基于用于选择AD转换或DA的转换选择信号，对模拟输入信号进行AD转换以输出转换的数字信号或执行数字输入信号的DA转换以输出转换的模拟信号 转换器包括：输入信号选择电路，被配置为基于输入选择信号从要输出的多个模拟输入信号中选择一个模拟信号; 输入采样保持电路，被配置为对从输入信号选择电路输出的模拟输入信号进行采样和保持; DA转换器，被配置为将数字信号转换为要输出的模拟信号; 比较器电路，被配置为输出指示从输入采样保持电路输出的模拟输入信号与从DA转换器输出的模拟信号之间的尺寸关系的比较信号; 顺序比较寄存器，其被配置为基于从比较电路输出的比较信号顺序地定义存储在寄存器中的数字信号的每个位置; 选择电路，被配置为接收存储在顺序比较寄存器中的数字信号，数字输入信号和转换选择信号，所述选择电路被配置为当转换时将所述顺序比较寄存器中存储的数字信号输出到DA转换器 选择信号指示AD转换，并且当转换选择信号指示DA转换时，将数字输入信号输出到DA转换器; 以及控制单元，被配置为当所述转换选择信号指示DA转换时输出所述输入选择信号。

公开(公告)号：US06819273B2

公开(公告)日：2004-11-16

申请号：US10367966

申请日：2003-02-19

Applicant: Tohru Mizutani ,  Hiromi Nanba ,  Atsushi Matsuda ,  Atsushi Hitaka ,  Masashi Okubo ,  Yoshinori Yoshikawa ,  Kenichi Minobe

Inventor： Tohru Mizutani ,  Hiromi Nanba ,  Atsushi Matsuda ,  Atsushi Hitaka ,  Masashi Okubo ,  Yoshinori Yoshikawa ,  Kenichi Minobe

IPC: H03M110

CPC classification number: H03M1/1019 ,  H03M1/02

Abstract: An integrated circuit includes an analog signal output unit which converts a digital output signal into at least one analog output signal, and outputs the at least one analog output signal, an analog signal input unit which converts at least one analog input signal received from an exterior into a digital input signal, a switch circuit which provides at least one signal path through which the at least one analog output signal is supplied from the analog signal output unit to the analog signal input unit as the at least one analog input signal, and an offset adjustment control circuit which supplies an output offset from the analog signal output unit to the analog signal input unit via the at least one signal path so as to detect the digital input signal inclusive of the output offset and an input offset, and cancels offsets of the analog signal output unit and the analog signal input unit in response to the output offset and the input offset obtained from the detected digital input signal.

Abstract translation: 集成电路包括模拟信号输出单元，其将数字输出信号转换为至少一个模拟输出信号，并输出至少一个模拟输出信号;模拟信号输入单元，其转换从外部接收的至少一个模拟输入信号 提供至少一个信号路径的开关电路，所述至少一个信号路径将所述至少一个模拟输出信号从所述模拟信号输出单元提供给所述模拟信号输入单元，作为所述至少一个模拟输入信号，以及 偏移调整控制电路，其经由所述至少一个信号路径将模拟信号输出单元的输出偏移提供给模拟信号输入单元，以检测包括输出偏移和输入偏移的数字输入信号，并且抵消 模拟信号输出单元和模拟信号输入单元，以响应于从检测到的数字输入信号获得的输出偏移和输入偏移 纳尔

公开(公告)号：US20030179118A1

公开(公告)日：2003-09-25

申请号：US10367966

申请日：2003-02-19

Inventor： Tohru Mizutani ,  Hiromi Nanba ,  Atsushi Matsuda ,  Atsushi Hitaka ,  Masashi Okubo ,  Yoshinori Yoshikawa ,  Kenichi Minobe

IPC: H03M001/06

CPC classification number: H03M1/1019 ,  H03M1/02

Abstract: An integrated circuit includes an analog signal output unit which converts a digital output signal into at least one analog output signal, and outputs the at least one analog output signal, an analog signal input unit which converts at least one analog input signal received from an exterior into a digital input signal, a switch circuit which provides at least one signal path through which the at least one analog output signal is supplied from the analog signal output unit to the analog signal input unit as the at least one analog input signal, and an offset adjustment control circuit which supplies an output offset from the analog signal output unit to the analog signal input unit via the at least one signal path so as to detect the digital input signal inclusive of the output offset and an input offset, and cancels offsets of the analog signal output unit and the analog signal input unit in response to the output offset and the input offset obtained from the detected digital input signal.

Abstract translation: 集成电路包括模拟信号输出单元，其将数字输出信号转换为至少一个模拟输出信号，并输出至少一个模拟输出信号;模拟信号输入单元，其转换从外部接收的至少一个模拟输入信号 提供至少一个信号路径的开关电路，所述至少一个信号路径将所述至少一个模拟输出信号从所述模拟信号输出单元提供给所述模拟信号输入单元，作为所述至少一个模拟输入信号，以及 偏移调整控制电路，其经由所述至少一个信号路径将模拟信号输出单元的输出偏移提供给模拟信号输入单元，以检测包括输出偏移和输入偏移的数字输入信号，并且抵消 模拟信号输出单元和模拟信号输入单元，以响应于从检测到的数字输入信号获得的输出偏移和输入偏移 纳尔

公开(公告)号：US4609906A

公开(公告)日：1986-09-02

申请号：US526859

申请日：1983-08-26

Applicant: Roger E. Wiegel

Inventor： Roger E. Wiegel

IPC: H03M1/00

CPC classification number: H03M1/02

Abstract: A circuit operable in two modes alternatively to provide a digital-to-analog converter capability and an analog-to-digital converter capability is disclosed utilizing a single digital multiplexer at a digital input and two analog multiplexers to control signal path routing. A track-and-hold circuit is utilized in the analog-to-digital configuration as a sample-and-hold, and alternatively in the digital-to-analog configuration as an operational amplifier.

Abstract translation: 利用数字输入端的单个数字多路复用器和两个模拟多路复用器来公开可以以两种模式可操作以提供数模转换器能力和模数转换器能力的电路来控制信号路径路由。 跟踪和保持电路在模数 - 数字配置中被用作采样保持，或者在作为运算放大器的数模转换配置中。

公开(公告)号：US4404544A

公开(公告)日：1983-09-13

申请号：US252600

申请日：1981-04-09

Applicant: Mirmira R. Dwarakanath

Inventor： Mirmira R. Dwarakanath

IPC: H03M1/74 ,  H03M1/00 ,  H04B14/04 ,  H03K13/02 ,  H03K13/08

CPC classification number: H03M1/02

Abstract: In a PCM CODEC, a binary-weighted charge redistribution capacitor array is designed to be configured for either .mu.-law or A-law coding. Selection of one or the other coding configuration is achieved by controlling a single gate circuit. A unique cascaded switch arrangement ensures that when selected capacitors representative of a specified coding segment are connected to a reference voltage source, the next successive capacitor of the array is automatically connected to a variable source that provides a voltage representative of a step within the specified segment.

Abstract translation: 在PCM编解码器中，二进制加权电荷再分配电容器阵列被设计为配置为μ-或A律编码。 通过控制单个门电路来实现一个或另一个编码配置的选择。 唯一的级联开关布置确保当代表指定编码段的选定电容器连接到参考电压源时，阵列的下一个连续电容器自动连接到可提供表示指定段内的步长的电压的可变源 。

公开(公告)号：USRE30294E

公开(公告)日：1980-06-03

申请号：US897925

申请日：1978-04-18

Applicant: Ernst Hofer

Inventor： Ernst Hofer

IPC: H03M1/00 ,  H04Q11/04

CPC classification number: H04Q11/04 ,  H03M1/02 ,  H03M1/822

Abstract: A switching arrangement for converting analog signals into digital signals, and vice versa, is described. Conversions between pulse amplitude modulated (PAM) and pulse code modulated (PCM) signals are performed. In telecommunication systems having subscriber stations equipped to transmit and receive analog signals it is necessary to carry out these conversions to facilitate PCM transmission. An analog to digital converter is thus provided at each subscriber station for converting received digital signals into analog signals and analog signals to be transmitted into digital signals; the converter utilizes the iterative principle.

公开(公告)号：US4184152A

公开(公告)日：1980-01-15

申请号：US864450

申请日：1977-12-27

Applicant: Tojiro Mukawa

Inventor： Tojiro Mukawa

IPC: H03M1/02 ,  H03M1/00 ,  H03M1/44 ,  H03M1/66 ,  H03K13/02

CPC classification number: H03M1/806 ,  H03M1/02 ,  H03M1/822

Abstract: A signal converting circuit for converting an analog signal to a digital signal, or vice versa, comprises a sampling capacitor which is charged to an input signal level during the period of a sampling pulse. A reference capacitor grounded at one end receives charges from the sampling capacitor in response to a first clock pulse. A predetermined reference potential is impressed on a terminal of the sampling capacitor at the time of the sampling pulse and a ground potential at the time the sampling pulse is not present. The reference capacitor is charged in response to the first clock pulse, and is discharged in response to a second clock pulse which alternates with the first clock pulse. The presence of a potential at the sampling capacitor less than the predetermined reference potential is detected, and the cycles of discharging of the reference capacitor that occur until the potential at the sampling capacitor is less than the reference potential are counted.Analog-to-digital (A/D) conversion is achieved by counting the number of discharges of the reference capacitor charged from the sampling capacitor. Digital-to-analog (D/A) conversion is carried out in the circuit when the sampling capacitor is charged to the predetermined potential of the sampling capacitor at the time a digital signal is taken out.

Abstract translation: 用于将模拟信号转换为数字信号的信号转换电路，反之亦然，包括在采样脉冲期间被充电至输入信号电平的采样电容器。 在一端接地的参考电容器响应于第一个时钟脉冲从采样电容器接收电荷。 在取样脉冲时，在采样电容器的端子上施加预定的参考电位，并且在不存在采样脉冲时的接地电位。 参考电容器响应于第一时钟脉冲而被充电，并且响应于与第一时钟脉冲交替的第二时钟脉冲而放电。 检测在采样电容器处的电位小于预定参考电位的电位，并且对采样电容器的电位之前发生的参考电容器的放电循环小于参考电位。 通过对从采样电容器充电的参考电容器的放电次数进行计数来实现模数（A / D）转换。 当采样电容器在取出数字信号时被充电到采样电容器的预定电位时，在电路中进行数模（D / A）转换。