Convergence control apparatus for video display
    1.
    发明授权
    Convergence control apparatus for video display 失效
    用于视频显示的会聚控制装置

    公开(公告)号:US07199533B2

    公开(公告)日:2007-04-03

    申请号:US11053909

    申请日:2005-02-10

    Applicant: Jang Ho Cho

    Inventor: Jang Ho Cho

    CPC classification number: H04N9/28 H04N3/20 H04N3/233 H04N5/74 H04N9/31

    Abstract: A convergence control apparatus for a video display is provided. In the apparatus, a convergence controller receives a vertical synchronization signal and a horizontal synchronization signal and then outputs a vertical convergence correction voltage and a horizontal convergence correction voltage. An amplifier receives and amplifies the vertical convergence correction voltage and the horizontal convergence correction voltage. A correction current generator receives the amplified vertical convergence correction voltage and the amplified horizontal convergence correction voltage and then generates a vertical convergence correction current and a horizontal convergence correction current. A switching unit controls the vertical convergence correction voltage and the horizontal convergence correction voltage according to the horizontal synchronization signal.

    Abstract translation: 提供了一种用于视频显示的会聚控制装置。 在该装置中,会聚控制器接收垂直同步信号和水平同步信号,然后输出垂直会聚校正电压和水平会聚校正电压。 放大器接收和放大垂直会聚校正电压和水平会聚校正电压。 校正电流发生器接收放大的垂直会聚校正电压和放大的水平会聚校正电压,然后产生垂直会聚校正电流和水平会聚校正电流。 开关单元根据水平同步信号控制垂直会聚校正电压和水平会聚校正电压。

    Sawtooth line circuit for a cathode ray tube
    2.
    发明申请
    Sawtooth line circuit for a cathode ray tube 失效
    用于阴极射线管的锯齿线电路

    公开(公告)号:US20040218105A1

    公开(公告)日:2004-11-04

    申请号:US10784019

    申请日:2004-02-20

    CPC classification number: H04N3/233

    Abstract: A circuit arrangement is described for generating a sawtooth current in a cathode ray tube deflection coil. The circuit arrangement has a first and a second multiresonant section. The sections are arranged in series. The cathode ray tube deflection coil is part of the first section. The second section has an inductor. Each section provides a trace period in which the sawtooth current is generated in the cathode ray tube deflection coil and a retrace period in which flyback of the sawtooth current is provided. The circuit arrangement further has a current control circuit coupled to the inductor for controlling the course of the sawtooth current.

    Raster distortion correction circuit
    3.
    发明授权
    Raster distortion correction circuit 失效
    栅格失真校正电路

    公开(公告)号:US06586895B2

    公开(公告)日:2003-07-01

    申请号:US10125737

    申请日:2002-04-18

    Applicant: Rudolf Weber

    Inventor: Rudolf Weber

    CPC classification number: H04N3/233

    Abstract: A horizontal deflection circuit includes a horizontal deflection winding coupled to a retrace capacitor to form a retrace resonant circuit. An S-shaping capacitor is coupled to the deflection winding to form a first trace resonant circuit. A first switching transistor is responsive to a synchronizing first signal at a frequency related to a horizontal deflection frequency and coupled to the deflection winding for generating a deflection current in the deflection winding. A second switching transistor is responsive to the first signal and having first and second switching state, during first and second portions of the trace interval. The second switching transistor couples the S-shaping capacitor to a modulation inductance and to a modulation capacitor to form a second trace resonant circuit, during the second portion of the trace interval. The length of the second portion is modulated at a vertical rate parabolic manner for modulating a current in the S-shaping capacitor to provide modulated S correction.

    Abstract translation: 水平偏转电路包括耦合到回扫电容器以形成回扫谐振电路的水平偏转线圈。 S整形电容器耦合到偏转绕组以形成第一迹线谐振电路。 第一开关晶体管响应于与水平偏转频率相关的频率的同步第一信号,并耦合到偏转绕组,用于在偏转绕组中产生偏转电流。 在跟踪间隔的第一和第二部分期间,第二开关晶体管响应于第一信号并具有第一和第二开关状态。 在跟踪间隔的第二部分期间,第二开关晶体管将S整形电容器耦合到调制电感和耦合到调制电容器以形成第二迹线谐振电路。 以垂直速率抛物线方式调制第二部分的长度,用于调制S整形电容器中的电流以提供调制的S校正。

    East-west distortion correction
    4.
    发明授权
    East-west distortion correction 失效
    东西扭曲矫正

    公开(公告)号:US06555976B2

    公开(公告)日:2003-04-29

    申请号:US09915654

    申请日:2001-07-26

    CPC classification number: H04N3/233

    Abstract: An apparatus for the correction of East-West distortion of images produced on the screen of a picture tube. More particularly, it concerns an electronic circuit for dynamically controlling the AC component of the drive signal to an East-West amplifier (14) in a picture tube horizontal scanning system. The electronic circuit comprises an input (44,66) for receiving a signal related to the beam current of the tube, an output for connection to the input of the East-West amplifier, a capacitive element (32,64), and an active control device (30,60) for controlling the capacitive element in response to the signal at the circuit input.

    Abstract translation: 一种用于校正在显像管屏幕上产生的图像的东西变形的装置。 更具体地说,它涉及一种电子电路,用于将显示管水平扫描系统中的东西放大器(14)的驱动信号的AC分量动态地控制。 电子电路包括用于接收与管的束电流有关的信号的输入端(44,66),用于连接到东西放大器的输入的输出端,电容元件(32,64)和有源 控制装置(30,60),用于响应于电路输入端的信号来控制电容元件。

    Digital keystone modulation circuit
    5.
    发明授权
    Digital keystone modulation circuit 失效
    数字梯形失真调制电路

    公开(公告)号:US06493044B1

    公开(公告)日:2002-12-10

    申请号:US09321975

    申请日:1999-05-28

    Applicant: Tian-Quey Lee

    Inventor: Tian-Quey Lee

    CPC classification number: H04N9/3185 H04N3/233 H04N5/74

    Abstract: A digital keystone modulation circuit for transforming a digital image to a digital projection image is disclosed. The digital image and the digital projection image have n horizontal image signals and n horizontal projection image signal respectively. The digital keystone modulation circuit includes an output controller for outputting a (3k−1)th image signal and one of a (3k−2)th and (3k)th image signal in response to an output image selected signal, an output image selector for outputting a first counting signal and the output image selected signal in response to a localization sync-signal, a first counting controller for counting in response to the counting signal, a kth horizontal projection image frequency, and a dot number of one of the (3k−2)th and (3k−1)th image signal, a second counting controller for counting in response to the output image selected signal, the kth horizontal projection signal, and a dot number of the (3k−1)th image signal, and a projection image frequency generator for outputting the kth projection image frequency in response to a horizontal sync-signal and a sum of the dot numbers of the (3k−2)th, (3k−1)th, and (3k−1)th image signals.

    Abstract translation: 公开了一种用于将数字图像变换成数字投影图像的数字梯形失真调制电路。 数字图像和数字投影图像分别具有n个水平图像信号和n个水平投影图像信号。 数字梯形失真调制电路包括:输出控制器,用于响应于输出图像选择信号输出第(3k-1)个图像信号和(3k-2)和(3k)图像信号中的一个;输出图像选择器 用于响应于定位同步信号输出第一计数信号和输出图像选择信号;第一计数控制器,用于响应于计数信号进行计数,第k个水平投影图像频率和( 3k-2)和(3k-1)图像信号,第二计数控制器,用于响应于输出图像选择信号,第k水平投影信号和第(3k-1)个图像信号的点数进行计数 ,以及投影图像频率发生器,用于响应于水平同步信号和(3k-2),(3k-1)和(3k-1)和(3k-1)的点号和 )图像信号。

    Vertical deflection circuit
    6.
    发明授权
    Vertical deflection circuit 失效
    垂直偏转电路

    公开(公告)号:US06369528B1

    公开(公告)日:2002-04-09

    申请号:US09197177

    申请日:1998-11-20

    CPC classification number: H04N3/233

    Abstract: A vertical linearity correction circuit including diodes and resistors is provided in a vertical deflection circuit, and a vertical deflection voltage applied to a vertical deflection yoke is corrected so as to follow a change in input impedance of the vertical deflection yoke. As a result, the vertical deflection speed in the vicinity of the central part of the image plane of the color picture tube is prevented from decreasing.

    Abstract translation: 在垂直偏转电路中设置包括二极管和电阻器的垂直线性校正电路,并且对垂直偏转线圈施加的垂直偏转电压进行校正,以便跟随垂直偏转线圈的输入阻抗的变化。 结果,可以防止彩色显像管的像面中心附近的垂直偏转速度降低。

    Raster distortion correction circuit
    7.
    发明授权
    Raster distortion correction circuit 失效
    栅格失真校正电路

    公开(公告)号:US06320332B1

    公开(公告)日:2001-11-20

    申请号:US09658169

    申请日:2000-09-08

    Applicant: Rudolf Weber

    Inventor: Rudolf Weber

    CPC classification number: H04N3/233

    Abstract: A series arrangement of an isolating diode and an East-West switching transistor is coupled between a flyback transformer primary winding and a horizontal deflection output transistor circuit to control retrace energy to obtain an East-West modulation of the deflection current amplitude. A first inductor, a tapped inductor and an S-shaping capacitor are coupled via a switch to form a resonant circuit, during the first half of trace. The tapped inductor includes a portion forming a current path for a deflection current. The tapped inductor develops a voltage that controls the switch. The first inductor, the tapped inductor and the S-shaping capacitor are coupled via the switch to form the trace resonant circuit, during the first half of trace. The trace resonant circuit provides inside pincushion raster distortion correction.

    Abstract translation: 隔离二极管和东西开关晶体管的串联布置耦合在反激式变压器初级绕组和水平偏转输出晶体管电路之间,以控制回扫能量以获得偏转电流幅度的东西调制。 在跟踪的前半段,第一电感器,抽头电感器和S整形电容器通过开关耦合以形成谐振电路。 抽头电感器包括形成用于偏转电流的电流路径的部分。 抽头电感器产生一个控制开关的电压。 在跟踪的前半段,第一个电感器,抽头电感器和S整形电容器通过开关耦合以形成迹线谐振电路。 跟踪谐振电路提供内部枕形光栅失真校正。

    Dynamic damping clamper arrangement associated with s-shaping capacitor
    8.
    发明授权
    Dynamic damping clamper arrangement associated with s-shaping capacitor 失效
    与s形整流电容相关的动态阻尼钳位器布置

    公开(公告)号:US06274989B1

    公开(公告)日:2001-08-14

    申请号:US09246279

    申请日:1999-02-08

    Inventor: Walter Truskalo

    CPC classification number: H04N3/233

    Abstract: A resistor-capacitor-diode clamp is coupled to an S-capacitance of a horizontal deflection circuit output stage for reducing ringing by causing critical damping. The supply voltage of the output stage varies at a vertical rate parabolic manner for modulating the horizontal deflection current to provide East-West correction. A clamp capacitor of the clamp has a terminal that is direct current coupled to the supply voltage. Therefore, each terminal of the clamp capacitor has the same vertical rate parabola component. Consequently, the DC voltage difference developed between the terminals of the clamp capacitor does not include any vertical rate parabola component, the result is that the sensitivity of the damping to the supply voltage vertical rate variations is, advantageously, eliminated or reduced.

    Abstract translation: 电阻 - 电容 - 二极管钳位与水平偏转电路输出级的S电容耦合,用于通过引起临界阻尼来减少振铃。 输出级的电源电压以垂直速率的抛物线方式变化,用于调制水平偏转电流以提供东西校正。 夹具的钳位电容器具有与电源电压耦合的直流电的端子。 因此,钳位电容器的每个端子具有相同的垂直速率抛物线分量。 因此,在钳位电容器的端子之间产生的直流电压差不包括任何垂直速度抛物线分量,结果是有利地消除或减少了阻尼对电源电压垂直速率变化的灵敏度。

    Deflection correction
    9.
    发明授权
    Deflection correction 有权
    偏转校正

    公开(公告)号:US06218791B1

    公开(公告)日:2001-04-17

    申请号:US09326508

    申请日:1999-06-04

    CPC classification number: H04N3/233

    Abstract: A deflection circuit includes a deflection correction circuit (Vs) with a controllable active voltage source (Vs) arranged in a loop formed by a deflection coil (Ld), an S-capacitor (Cs), and a flyback capacitor (Cf). The voltage source (Vs) receives a further power supply voltage (Vb2) and a modulating signal (M) to supply a modulating voltage (Vm) varying in response to the modulating signal (M). The active voltage source (Vs) includes a switching element (S2) which is switched on and off with a frequency which is substantially higher than the deflection frequency to to enable waveforms of the modulating voltage (Vm) with a frequency content which is substantially higher than the deflection frequency such that any desired waveform can be generated within the deflection period (Td).

    Abstract translation: 偏转电路包括具有以由偏转线圈(Ld),S电容器(Cs)和回扫电容器(Cf)形成的环路中布置的可控有源电压源(Vs)的偏转校正电路(Vs)。 电压源(Vs)接收另外的电源电压(Vb2)和调制信号(M),以提供响应于调制信号(M)而变化的调制电压(Vm)。 有源电压源(Vs)包括以基本上高于偏转频率的频率接通和断开的开关元件(S2),以使频率含量基本上更高的调制电压(Vm)的波形 偏转频率使得在偏转周期(Td)内可以产生任何期望的波形。

    Vertical pin distortion correction apparatus and method for a multi-scan display
    10.
    发明授权
    Vertical pin distortion correction apparatus and method for a multi-scan display 失效
    用于多扫描显示的垂直针失真校正装置和方法

    公开(公告)号:US06208320B1

    公开(公告)日:2001-03-27

    申请号:US09079658

    申请日:1998-05-15

    CPC classification number: H04N3/27 G09G1/04 H04N3/233 H04N5/68

    Abstract: An apparatus and method for providing image correction for a multi-frequency display system. The apparatus comprises a circuit that generates a first signal based on a correct on signal, a horizontal synchronization signal and a vertical synchronization signal. The apparatus also comprises a deflection circuit that generates a deflection signal based on the first signal and the vertical synchronization signal. The deflection circuit is operable within a range of frequencies. A video processing circuit coupled to the deflection circuit, and receives a video input signal and the deflection signal. The video processing circuit generates an output video signal based on the deflection signal and the video input signal.

    Abstract translation: 一种用于为多频显示系统提供图像校正的装置和方法。 该装置包括基于正确的导通信号,水平同步信号和垂直同步信号产生第一信号的电路。 该装置还包括基于第一信号和垂直同步信号产生偏转信号的偏转电路。 偏转电路在频率范围内可操作。 耦合到偏转电路的视频处理电路,并且接收视频输入信号和偏转信号。 视频处理电路基于偏转信号和视频输入信号产生输出视频信号。

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