Input/output switching apparatus having virtual control
    2.
    发明授权
    Input/output switching apparatus having virtual control 失效
    具有虚拟控制的输入/输出开关装置

    公开(公告)号:US5686905A

    公开(公告)日:1997-11-11

    申请号:US404955

    申请日:1995-03-16

    IPC分类号: H04Q3/52 H04Q1/00 H04Q3/00

    CPC分类号: H04Q3/523

    摘要: An input/output switching apparatus which can construct the system more flexibly as compared with the conventional system. The input/output switching apparatus is configured so that a user can manage the connection state of a physically-existing switching unit as the connection state of a virtual switching unit which corresponds to the physically-existing switching unit. Thus, the user can control the physical switching unit merely by operating the virtual switching unit which is constructed so as to be convenient for operation.

    摘要翻译: 与常规系统相比,可以更灵活地构建系统的输入/输出切换装置。 输入/输出切换装置被配置为使得用户可以管理物理存在的交换单元的连接状态作为对应于物理存在的切换单元的虚拟交换单元的连接状态。 因此,用户可以仅通过操作构造为便于操作的虚拟切换单元来控制物理切换单元。

    Broadband signal switching equipment
    3.
    发明授权
    Broadband signal switching equipment 失效
    宽带信号交换设备

    公开(公告)号:US4963863A

    公开(公告)日:1990-10-16

    申请号:US258020

    申请日:1988-10-14

    申请人: Ruediger Hofmann

    发明人: Ruediger Hofmann

    IPC分类号: H04Q3/52

    CPC分类号: H04Q3/523

    摘要: In a broadband signal switching equipment having crosspoint matrix using FET technology devices crosspoint-associated storage memory cells that control switching elements are each formed with two cross-coupled n-MOS inverter circuits each of which has its input side connected via a selection transistor to a selection line that carries a non-inverted and an inverted selection signal of one selection direction, respectively. Both selection transistors receive on their control electrodes the selection signal of the other selection direction. The control electrodes of two load transistors of the two cross-coupled n-channel inverter circuits are connected to the selection line that carries the inverted selection clock signal of the other selection direction. An additional driver transistor of the same channel type as two driver transistors in the two cross-coupled n-channel inverter circuits is inserted between the two drive transistors of the two cross-coupled n-channel inverter circuits and ground or a feed potential terminal. The control electrode of this additional driver transistor is connected to the selection line that carries the inverted selection clock signal of the other selection direction.

    摘要翻译: 在具有使用FET技术的交叉点矩阵的宽带信号交换设备中,控制开关元件的交叉点相关联的存储单元分别由两个交叉耦合的n-MOS反相器电路形成,每个都具有经由选择晶体管连接到 选择线分别携带一个选择方向的非反相和反相选择信号。 两个选择晶体管在其控制电极上接收另一选择方向的选择信号。 两个交叉耦合的n沟道反相器电路的两个负载晶体管的控制电极连接到携带另一个选择方向的反相选择时钟信号的选择线。 在两个交叉耦合的n沟道反相器电路中,与两个交叉耦合的n沟道反相器电路和接地或馈电电位端子的两个驱动晶体管之间插入与两个交叉耦合的n沟道反相器电路中的两个驱动晶体管相同通道类型的附加驱动晶体管。 该附加驱动晶体管的控制电极连接到携带另一选择方向的反相选择时钟信号的选择线。

    Deterministic routing method for minimal switch circuits
    5.
    发明授权
    Deterministic routing method for minimal switch circuits 失效
    最小开关电路的确定性路由方法

    公开(公告)号:US5371495A

    公开(公告)日:1994-12-06

    申请号:US824940

    申请日:1992-01-24

    IPC分类号: H04Q3/52 H04Q3/68 H04Q3/00

    摘要: A deterministic routing method for switch matrices. The routed matrix receives N input signals and produces M output signals on M output columns. The method of the present invention has three steps. First, each of the M output columns in the switch matrix is searched for each of N separate input signals. Secondly, each of the N inputs is assigned to its located column. If all of the N inputs cannot be assigned to one of the M columns, the set of inputs is shifted and the steps are repeated until all of the N inputs are routed.

    摘要翻译: 一种用于开关矩阵的确定性路由方法。 路由矩阵接收N个输入信号,并在M个输出列上产生M个输出信号。 本发明的方法有三个步骤。 首先,搜索开关矩阵中的每个M个输出列,分别输入N个独立的输入信号。 其次,将N个输入中的每一个分配给其定位的列。 如果所有N个输入都不能分配给M列中的一个,则输入集合被移位,并重复这些步骤,直到所有N个输入都被路由为止。

    Broadband signal switching network with respective threshold-value
holding feedback member
    6.
    发明授权
    Broadband signal switching network with respective threshold-value holding feedback member 失效
    宽带信号交换网络具有相应的阈值保持反馈成员

    公开(公告)号:US5121111A

    公开(公告)日:1992-06-09

    申请号:US552125

    申请日:1990-07-13

    IPC分类号: H04Q3/52

    CPC分类号: H04Q3/523

    摘要: In a broadband signal switching network with a switching point matrix constructed in FET technology, an input driver circuit is connected for feeding a respective matrix input line, which driver circuit is blocked via an inhibit input when a prescribed signal level is reached on the respective matrix input line which guarantees a safe switch through of the switching element connected with the matrix input line, whereby a further recharging of the matrix input line is prevented.

    摘要翻译: 在具有由FET技术构成的开关点矩阵的宽带信号交换网络中,输入驱动电路被连接用于馈送相应的矩阵输入线,当在相应矩阵上达到规定的信号电平时该驱动电路被禁止输入阻塞 输入线,其保证与矩阵输入线连接的开关元件的安全切换,从而防止矩阵输入线的进一步再充电。

    Crossbar switch and method with reduced voltage swing and no internal
blocking data path
    7.
    发明授权
    Crossbar switch and method with reduced voltage swing and no internal blocking data path 失效
    交叉开关和方法具有降低的电压摆幅和无内部阻塞数据路径

    公开(公告)号:US5991296A

    公开(公告)日:1999-11-23

    申请号:US604920

    申请日:1996-02-22

    IPC分类号: H04L12/56 H04Q3/52

    摘要: A switch system and method transfer a data packet from a source data port to one or more destination data ports through a switch. The system comprises a source input buffer, a first and a second source input path, a first and a second output path and at least one crosspoint circuit. The source input buffer includes a first and a second data section. The first and the second data sections are coupled to the first and the second input paths respectively. The first and the second input paths couple through the crosspoint circuits at each intersection with the first and the second output paths. The method includes loading the data packets into data sections of an input buffer, transferring each data packet across an input path dedicated for each data section, transmitting each data packet over its input path, and switching the data from the input path to the output path based on a voltage differential. A crosspoint circuit in the switch system includes a first and a second reduced voltage swing line, a first and a second transistor circuit for each data input path and a sense amplifier for a data port. The first reduced voltage swing line is coupled to the first transistor circuit, the second reduced voltage swing line is coupled to the second transistor circuit and both reduced voltage swing lines are connected to the sense amplifier. The method of the unit comprises the steps of charging a first and a second reduced voltage swing line to a predetermined voltage, discharging the voltage from the first reduced voltage swing line, maintaining the voltage in the second voltage line, receiving a clock signal at the sense amplifier, and generating an output signal based on a voltage differential between the voltage lines.

    摘要翻译: 交换机系统和方法通过交换机将数据分组从源数据端口传送到一个或多个目的数据端口。 该系统包括源输入缓冲器,第一和第二源输入路径,第一和第二输出路径以及至少一个交叉点电路。 源输入缓冲器包括第一和第二数据段。 第一和第二数据部分分别耦合到第一和第二输入路径。 第一和第二输入路径在与第一和第二输出路径的每个交叉处耦合通过交叉点电路。 该方法包括将数据分组加载到输入缓冲器的数据部分中,通过专用于每个数据部分的输入路径传送每个数据分组,在其输入路径上传送每个数据分组,并将数据从输入路径切换到输出路径 基于电压差。 开关系统中的交叉点电路包括第一和第二降压摆线,用于每个数据输入路径的第一和第二晶体管电路以及用于数据端口的读出放大器。 第一降压摆动线耦合到第一晶体管电路,第二降压摆线与第二晶体管电路耦合,并且两个还原电压摆幅线连接到读出放大器。 该单元的方法包括以下步骤:将第一和第二降压摆幅线充电至预定电压,对来自第一降压摆幅线的电压进行放电,保持第二电压线中的电压,接收时钟信号 读出放大器,并且基于电压线之间的电压差产生输出信号。

    Method and apparatus for routing in reduced switch matrices to provide
one hundred percent coverage
    8.
    发明授权
    Method and apparatus for routing in reduced switch matrices to provide one hundred percent coverage 失效
    用于在减少的开关矩阵中路由以提供百分之百覆盖的方法和装置

    公开(公告)号:US5572198A

    公开(公告)日:1996-11-05

    申请号:US279954

    申请日:1994-07-25

    申请人: Jay Sturges

    发明人: Jay Sturges

    IPC分类号: H04Q3/52 H04B3/38

    CPC分类号: H04Q3/523

    摘要: A field programmable gate array in which the pattern of a first smaller switch matrix is continued into a number of other smaller reduced switch matrices necessary to provide full coverage for all of the input conductor combinations at the output conductors.

    摘要翻译: 现场可编程门阵列,其中第一较小开关矩阵的模式继续进入为输出导体的所有输入导体组合提供全覆盖所需的其它较小的减小开关矩阵。

    EPROM-based crossbar switch with zero standby power
    9.
    发明授权
    EPROM-based crossbar switch with zero standby power 失效
    基于EPROM的交叉开关具有零待机功率

    公开(公告)号:US5517186A

    公开(公告)日:1996-05-14

    申请号:US159189

    申请日:1993-11-30

    申请人: Kerry Veenstra

    发明人: Kerry Veenstra

    IPC分类号: H04Q3/52 H04Q9/00

    CPC分类号: H04Q3/523

    摘要: An EPROM-based crossbar switch is disclosed that provides for the programmable interconnection of logic circuitry. Circuit layout and design features reduce circuit real estate and bitline parasitic capacitances, allowing a high level of integration and faster switching speeds.

    摘要翻译: 公开了一种基于EPROM的交叉开关,其提供逻辑电路的可编程互连。 电路布局和设计特性降低了电路的不动产和位线寄生电容,从而实现了高集成度和更快的开关速度。

    Crossbar switch and method with crosspoint circuit
    10.
    发明授权
    Crossbar switch and method with crosspoint circuit 失效
    交叉开关和交叉点电路方法

    公开(公告)号:US06490213B1

    公开(公告)日:2002-12-03

    申请号:US09419702

    申请日:1999-10-14

    IPC分类号: G11C702

    摘要: A switch system and method transfer a data packet from a source data port to one or more destination data ports through a switch. The system includes at least one crosspoint circuit. A crosspoint circuit in the switch system includes a first and a second reduced voltage swing line, a first and a second transistor circuit for each data input path and a sense amplifier for a data port. The first reduced voltage swing line is coupled to the first transistor circuit, the second reduced voltage swing line is coupled to the second transistor circuit and both reduced voltage swing lines are connected to the sense amplifier. A method for transferring data using a crosspoint circuit includes a charging first voltage line and a second voltage line to a predetermined voltage level, discharging the predetermined voltage level in the first voltage line, maintaining the predetermined voltage level in the second voltage line concurrently with the discharging step, receiving a high clock signal at a sense amplifier, and generating an output signal based on a differential voltage level at the arrival of the clock signal.

    摘要翻译: 交换机系统和方法通过交换机将数据分组从源数据端口传送到一个或多个目的数据端口。 该系统包括至少一个交叉点电路。 开关系统中的交叉点电路包括第一和第二降压摆线,用于每个数据输入路径的第一和第二晶体管电路以及用于数据端口的读出放大器。 第一降压摆动线耦合到第一晶体管电路,第二降压摆线与第二晶体管电路耦合,并且两个还原电压摆幅线连接到读出放大器。 使用交叉点电路传送数据的方法包括充电第一电压线和第二电压线到预定电压电平,放电第一电压线中的预定电压电平,同时保持第二电压线中的预定电压电平 放电步骤,在感测放大器处接收高时钟信号,以及在时钟信号到达时基于差分电压电平产生输出信号。