ARRAY SUBSTRATE AND DISPLAY APPARATUS
    2.
    发明申请

    公开(公告)号:WO2023039842A1

    公开(公告)日:2023-03-23

    申请号:PCT/CN2021/119097

    申请日:2021-09-17

    Abstract: An array substrate is provided. The array substrate includes K number of reset signal lines respectively configured to provide reset signals to reset transistors in K columns pixel driving circuits of the array substrate. The K number of reset signal lines includes a plurality of third reset signal lines in (2k-1) -th columns of K columns, K and k being positive integers, 1 ≤ k ≤ (K/2); and a plurality of fourth reset signal lines in (2k) -th columns of the K columns. A respective third reset signal line and a respective fourth reset signal line have different line patterns.

    ARRAY SUBSTRATE AND DISPLAY APPARATUS
    5.
    发明申请

    公开(公告)号:WO2022188374A1

    公开(公告)日:2022-09-15

    申请号:PCT/CN2021/115249

    申请日:2021-08-30

    Abstract: An array substrate is provided. A respective pixel driving circuit of the array substrate includes a driving transistor, a storage capacitor, and a transistor having a gate electrode connected to a respective second gate line of a plurality of second gate lines, a first electrode connected to a first capacitor electrode of the storage capacitor, and a second electrode connected to a second electrode of a first reset transistor, the transistor being configured to receive a reset signal through the first reset transistor. An active layer of the driving transistor and an active layer of the transistor are spaced apart from each other by at least an insulating layer. The active layer of the driving transistor comprises a first semiconductor material. The active layer of the transistor comprises a second semiconductor material different from the first semiconductor material.

    ARRAY SUBSTRATE AND DISPLAY APPARATUS
    6.
    发明申请

    公开(公告)号:WO2022160255A1

    公开(公告)日:2022-08-04

    申请号:PCT/CN2021/074436

    申请日:2021-01-29

    Abstract: An array substrate is provided. The array substate includes a base substrate; a semiconductor material layer on the base substrate; and a plurality of voltage supply lines on a side of the semiconductor material layer away from the base substrate. In a respective subpixel, the semiconductor material layer includes an active layer of a third transistor, an active layer of a fifth transistor, an active layer of a driving transistor, and a third node portion that is connected to the active layer of the third transistor, the active layer of the fifth transistor, and the active layer of the driving transistor in the respective subpixel. At least 30%of an orthographic projection of the third node portion on the base substrate is non-overlapping with an orthographic projection of a respective voltage supply line on the base substrate.

    ARRAY SUBSTRATE AND DISPLAY APPARATUS
    7.
    发明申请

    公开(公告)号:WO2022133972A1

    公开(公告)日:2022-06-30

    申请号:PCT/CN2020/139199

    申请日:2020-12-25

    Abstract: An array substrate is provided. A first virtual line and a second virtual line respectively cross over a first voltage supply line, a second voltage supply line, and a third voltage supply line. The first voltage supply line, the second voltage supply line, and the third voltage supply line respectively include a first voltage supply line portion, a second voltage supply line portion, and a third voltage supply line portion, respectively between the first virtual line and the second virtual line. An orthographic projection of a third anode of a third light emitting element on a base substrate completely covers an orthographic projection of the third voltage supply line portion on the base substrate. The third voltage supply line portion has a line width greater than a line width of the first voltage supply line portion, and greater than a line width of the second voltage supply line portion.

    ARRAY SUBSTRATE AND DISPLAY APPARATUS
    8.
    发明申请

    公开(公告)号:WO2022133971A1

    公开(公告)日:2022-06-30

    申请号:PCT/CN2020/139197

    申请日:2020-12-25

    Abstract: An array substrate is provided. The array substrate includes a gate line; a data line; a voltage supply line; and a pixel driving circuit. The pixel driving circuit includes a plurality of transistors and a storage capacitor. The storage capacitor includes a first capacitor electrode, a second capacitor electrode, and an insulating layer between the first capacitor electrode and the second capacitor electrode. The second capacitor electrode is electrically connected to the voltage supply line. The second capacitor electrode includes a first portion and a second portion as parts of a first unitary structure in a respective subpixel. The voltage supply line crosses over the first portion by a first crossing-over distance. The data line crosses over the second portion by a second crossing-over distance. The first crossing-over distance is greater than the second crossing-over distance.

    TOUCH CONTROL STRUCTURE AND DISPLAY APPARATUS

    公开(公告)号:WO2022133820A1

    公开(公告)日:2022-06-30

    申请号:PCT/CN2020/138674

    申请日:2020-12-23

    Abstract: A touch control structure is provided. The touch control structure includes a plurality of first mesh electrodes along a row direction and a plurality of second mesh electrodes along a column direction. The touch control structure is limited in a touch control region and absent in a window region surrounded by the touch control region. The plurality of second mesh electrodes includes a first mesh block and a second mesh block; a first conductive plate connected to one or more mesh lines of the first mesh block; a second conductive plate connected to one or more mesh lines of the second mesh block; and a first conductive bridge connecting the first conductive plate and the second conductive plate. A second segment of the first conductive bridge is in a layer different from a first segment of the first conductive bridge, the first conductive plate, and the second conductive plate.

    COMPUTER-IMPLEMENTED METHOD FOR DEFECT ANALYSIS, APPARATUS FOR DEFECT ANALYSIS, COMPUTER-PROGRAM PRODUCT, AND INTELLIGENT DEFECT ANALYSIS SYSTEM

    公开(公告)号:WO2022116109A1

    公开(公告)日:2022-06-09

    申请号:PCT/CN2020/133683

    申请日:2020-12-03

    Abstract: A computer-implemented method for defect analysis is provided. The computer-implemented method includes obtaining a plurality of sets of defect point coordinates, a respective set of the plurality of sets of defect point coordinates including coordinates of defect points in a respective substrate of a plurality of substrates, the coordinates of defect points in the respective substrate being coordinates in an image coordinate system; combining the plurality of sets of defect point coordinates according to the image coordinate system into a composite set of coordinates to generate a composite image; and performing a clustering analysis to classify defect points in the composite set in the composite image into a plurality of clusters.

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