Abstract:
A method performed by a receiver is provided. The method includes generating an RDS/RBDS candidate codeword from a set of RDS/RBDS symbols where the RDS/RBDS candidate codeword has a subset of RDS/RBDS values that differs from corresponding subsets of RDS/RBDS values in all other possible RDS/RBDS codewords and determining whether the RDS/RBDS candidate codeword meets an acceptance criterion by comparing a first subset of reliability values determined from the set of RDS/RBDS symbols and having signs that differ from corresponding signs in the subset of RDS/RBDS values with a second subset of reliability values determined from the set of RDS/RBDS symbols and mutually exclusive with the first subset of the reliability values. A first number of values in the first and the second subsets of reliability values is less than a second number of values in the RDS/RBDS candidate codeword.
Abstract:
A technique includes digitally generating orthogonal modulated signals, each of which has spectral energy that is generally centered at an intermediate frequency. The orthogonal modulated signals are frequency translated to produce translated signals, each of which has spectral energy that is generally centered about a second frequency that is higher than the intermediate frequency. The translated signals are combined to generate a modulated signal.
Abstract:
An integrated circuit (500) includes a semiconductor substrate (400) and an integrated circuit package (530). The semiconductor substrate (400) has a first pair of bonding pads (442, 444) conducting a differential output signal thereon and adapted to be coupled to an input of a first external filter, and a second pair of bonding pads (452, 454) conducting a differential input signal thereon and adapted to be coupled to an output of said first external filter. The integrated circuit package (530) encapsulates the semiconductor substrate (400) and has first (452, 454) and second (552, 554) terminal pairs corresponding and coupled to the first (442, 444) and second (452, 454) pairs of bonding pads, respectively. The first (452, 454) and second (552, 554) terminal pairs are separated by a first predetermined distance sufficient to maintain an input-to-output isolation therebetween of at least a first predetermined amount.
Abstract:
A magnetically differential input circuit (20) is arranged to define at least two loops (L1 and L2), wherein each of the loops traverses the input (231) of a receiving circuit. The loops (L1 and L2) are physically arranged so that a source of interference (L3) induces opposing signals in the loops (L1 and L2), thereby effecting cancellation of the interference at the input (231) of the receiving circuit. In one embodiment, the input circuit (20) is arranged to be electrically differential as well as magnetically differential.
Abstract:
The present invention is a combined modem and line-isolation system (150), including a line-side line-isolation integrated circuit (102), a system-side line-isolation integrated circuit (100), and digital signal processing (DSP) circuitry (154) included within the system-side line-isolation circuit, where the DSP circuit has a modem processor for modem data and a digital processor for system-side circuitry.
Abstract:
A method for interfacing with a capacitive touch screen is disclosed. The method includes charging an internal capacitor in the touch screen, which internal capacitor is disposed proximate a fixed location on the touch screen and is capable of changing in response to a touch at the specific location. After charging, the charge on the internal capacitor is transferred from the touch screen and the value of the charge on the internal capacitor then determined.
Abstract:
Methods and apparatus for communicating PCM and SDI data on a common interface are described. Various embodiments of the common interface include two (580, 582, 1180, 1182) to three (880, 882) signal lines. The signal lines are unidirectional or bi-directional. A clock signal may be provided by dedicated signal line or recovered from frames carried by the signal lines. One embodiment includes a first device (522) coupled (710) to a second device (510) with a bi directional data line (574) and a clock line (572). Frames of data are serially communicated (720) between the first and second devices on the data line. Each frame is synchronized with a clock signal carried by the clock line. Each frame (602) has a portion allocated to data communicated from the first device to the second device and another portion allocated to data communicated from the second device to the first device.
Abstract:
The integrated system on a chip with LINBUS network communication capabilities includes processing circuitry for performing predefined digital processing functionalities on the chip. A free running clock circuit generates a temperature compensated clock that does not require a synch signal from external to the chip. A LINBUS network communications interface digitally communicates with off-chip LINBUS devices. Communication between said on-chip LINBUS communications interface and the off-chip LINBUS devices is affected without clock recovery. The LINBUS network communication interface has a time base derived from the temperature compensated clock which is independent of any timing information in the input data received during a receive operation. The temperature compensated clock further provides an on-chip time reference for both the processing circuitry and the LINBUS network communications interface.
Abstract:
A powered device includes a voltage protection circuit, two outputs, a switch, and a snubber circuit. The two outputs of the integrated circuit maybe coupled to an external transformer. The snubber circuit of the integrated circuit is responsive to the switch and is coupled with respect to the two outputs to direct energy from at least one of the two outputs to the voltage protection circuit.
Abstract:
In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.