SYSTEM AND METHOD FOR DECODING RDS/RBDS DATA
    11.
    发明申请
    SYSTEM AND METHOD FOR DECODING RDS/RBDS DATA 审中-公开
    用于解码RDS / RBDS数据的系统和方法

    公开(公告)号:WO2009064658A3

    公开(公告)日:2009-11-05

    申请号:PCT/US2008082645

    申请日:2008-11-06

    Inventor: TAIPALE DANA

    CPC classification number: H04H40/18 H04B1/1646 H04H2201/13

    Abstract: A method performed by a receiver is provided. The method includes generating an RDS/RBDS candidate codeword from a set of RDS/RBDS symbols where the RDS/RBDS candidate codeword has a subset of RDS/RBDS values that differs from corresponding subsets of RDS/RBDS values in all other possible RDS/RBDS codewords and determining whether the RDS/RBDS candidate codeword meets an acceptance criterion by comparing a first subset of reliability values determined from the set of RDS/RBDS symbols and having signs that differ from corresponding signs in the subset of RDS/RBDS values with a second subset of reliability values determined from the set of RDS/RBDS symbols and mutually exclusive with the first subset of the reliability values. A first number of values in the first and the second subsets of reliability values is less than a second number of values in the RDS/RBDS candidate codeword.

    Abstract translation: 提供了由接收机执行的方法。 该方法包括从一组RDS / RBDS符号生成RDS / RBDS候选码字,其中RDS / RBDS候选码字具有与所有其他可能的RDS / RBDS中的RDS / RBDS值的对应子集不同的RDS / RBDS值的子集 通过将从所述一组RDS / RBDS符号确定并且具有与所述RDS / RBDS值的所述子集中的对应符号不同的符号的可靠性值的第一子集与第二第二符号进行比较来确定所述RDS / RBDS候选码字是否满足接受准则 从该组RDS / RBDS符号确定并且与可靠性值的第一子集互斥的可靠性值的子集。 可靠性值的第一和第二子集中的第一数量的值小于RDS / RBDS候选码字中的第二数量的值。

    TRANSMITTER ARCHITECTURE
    12.
    发明申请
    TRANSMITTER ARCHITECTURE 审中-公开
    发射机架构

    公开(公告)号:WO2007123643A3

    公开(公告)日:2008-03-13

    申请号:PCT/US2007007861

    申请日:2007-03-29

    CPC classification number: H03C3/40

    Abstract: A technique includes digitally generating orthogonal modulated signals, each of which has spectral energy that is generally centered at an intermediate frequency. The orthogonal modulated signals are frequency translated to produce translated signals, each of which has spectral energy that is generally centered about a second frequency that is higher than the intermediate frequency. The translated signals are combined to generate a modulated signal.

    Abstract translation: 一种技术包括数字生成正交调制信号,每个信号具有通常以中间频率为中心的频谱能量。 正交调制信号被频率转换以产生转换的信号,每个信号具有通常以高于中频的第二频率为中心的频谱能量。 经翻译的信号被组合以产生调制信号。

    INTEGRATED CIRCUIT SUITABLE FOR USE IN RADIO RECEIVERS
    13.
    发明申请
    INTEGRATED CIRCUIT SUITABLE FOR USE IN RADIO RECEIVERS 审中-公开
    集成电路适用于无线电接收器

    公开(公告)号:WO2005034179A3

    公开(公告)日:2006-01-12

    申请号:PCT/US2004028755

    申请日:2004-09-03

    CPC classification number: H01L23/66 H01L23/50 H01L2924/0002 H01L2924/00

    Abstract: An integrated circuit (500) includes a semiconductor substrate (400) and an integrated circuit package (530). The semiconductor substrate (400) has a first pair of bonding pads (442, 444) conducting a differential output signal thereon and adapted to be coupled to an input of a first external filter, and a second pair of bonding pads (452, 454) conducting a differential input signal thereon and adapted to be coupled to an output of said first external filter. The integrated circuit package (530) encapsulates the semiconductor substrate (400) and has first (452, 454) and second (552, 554) terminal pairs corresponding and coupled to the first (442, 444) and second (452, 454) pairs of bonding pads, respectively. The first (452, 454) and second (552, 554) terminal pairs are separated by a first predetermined distance sufficient to maintain an input-to-output isolation therebetween of at least a first predetermined amount.

    Abstract translation: 集成电路(500)包括半导体衬底(400)和集成电路封装(530)。 半导体衬底(400)具有在其上传导差分输出信号并适于耦合到第一外部滤波器的输入的第一对接合焊盘(442,444)和第二对接合焊盘(452,454) 在其上传导差分输入信号并适于耦合到所述第一外部滤波器的输出。 集成电路封装(530)封装半导体衬底(400)并且具有对应于第一(442,444)和第二(452,454)对的第一(452,454)和第二(552,554)端子对 的焊盘。 第一(452,454)和第二(552,554)端子对被隔开第一预定距离,足以保持其间至少第一预定量的输入到输出隔离。

    MAGNETICALLY DIFFERENTIAL INPUT
    14.
    发明申请
    MAGNETICALLY DIFFERENTIAL INPUT 审中-公开
    磁性差分输入

    公开(公告)号:WO2005099202A3

    公开(公告)日:2005-12-15

    申请号:PCT/US2005009752

    申请日:2005-03-23

    CPC classification number: H04B15/00 H05K1/0228

    Abstract: A magnetically differential input circuit (20) is arranged to define at least two loops (L1 and L2), wherein each of the loops traverses the input (231) of a receiving circuit. The loops (L1 and L2) are physically arranged so that a source of interference (L3) induces opposing signals in the loops (L1 and L2), thereby effecting cancellation of the interference at the input (231) of the receiving circuit. In one embodiment, the input circuit (20) is arranged to be electrically differential as well as magnetically differential.

    Abstract translation: 设置一个磁差动输入电路(20)以限定至少两个回路(L1和L2),其中每个回路穿过接收电路的输入(231)。 环路(L1和L2)在物理上布置为使得干扰源(L3)在环路(L1和L2)中感应相反的信号,由此实现接收电路的输入(231)处的干扰消除。 在一个实施例中,输入电路(20)被布置成电差分以及磁差分。

    INTEGRATED MODEM AND LINE-ISOLATION CIRCUITRY AND ASSOCIATED METHOD
    15.
    发明申请
    INTEGRATED MODEM AND LINE-ISOLATION CIRCUITRY AND ASSOCIATED METHOD 审中-公开
    集成调制解调器和线路隔离电路及相关方法

    公开(公告)号:WO0108343A9

    公开(公告)日:2001-10-18

    申请号:PCT/US0020078

    申请日:2000-07-21

    CPC classification number: H04L27/00 H04L25/0266 H04L25/4927

    Abstract: The present invention is a combined modem and line-isolation system (150), including a line-side line-isolation integrated circuit (102), a system-side line-isolation integrated circuit (100), and digital signal processing (DSP) circuitry (154) included within the system-side line-isolation circuit, where the DSP circuit has a modem processor for modem data and a digital processor for system-side circuitry.

    Abstract translation: 本发明是包括线路侧线路隔离集成电路(102),系统侧线路隔离集成电路(100)和数字信号处理(DSP)的组合调制解调器和线路隔离系统(150) 包括在系统侧线路隔离电路内的电路(154),其中DSP电路具有用于调制解调器数据的调制解调器处理器和用于系统侧电路的数字处理器。

    MULTI-TOUCH RESOLVE MUTUAL CAPACITANCE SENSOR
    16.
    发明申请
    MULTI-TOUCH RESOLVE MUTUAL CAPACITANCE SENSOR 审中-公开
    多触摸分辨率互连电容传感器

    公开(公告)号:WO2012030704A3

    公开(公告)日:2012-05-31

    申请号:PCT/US2011049523

    申请日:2011-08-29

    Inventor: WELLAND DAVID

    CPC classification number: G06F3/044 G06F3/0416

    Abstract: A method for interfacing with a capacitive touch screen is disclosed. The method includes charging an internal capacitor in the touch screen, which internal capacitor is disposed proximate a fixed location on the touch screen and is capable of changing in response to a touch at the specific location. After charging, the charge on the internal capacitor is transferred from the touch screen and the value of the charge on the internal capacitor then determined.

    Abstract translation: 公开了一种用于与电容式触摸屏接口的方法。 该方法包括对触摸屏中的内部电容器充电,该内部电容器靠近触摸屏上的固定位置布置,并且能够响应于特定位置处的触摸而改变。 充电后,内部电容器上的电荷从触摸屏传输,然后确定内部电容器上的电荷值。

    SUBSCRIBER LINE INTERFACE CIRCUITRY WITH INTEGRATED SERIAL INTERFACES
    17.
    发明申请
    SUBSCRIBER LINE INTERFACE CIRCUITRY WITH INTEGRATED SERIAL INTERFACES 审中-公开
    具有集成串行接口的订户线接口电路

    公开(公告)号:WO2010078474A2

    公开(公告)日:2010-07-08

    申请号:PCT/US2009069884

    申请日:2009-12-31

    CPC classification number: H04M11/068 H04L12/2885 H04L12/2896 H04M3/007

    Abstract: Methods and apparatus for communicating PCM and SDI data on a common interface are described. Various embodiments of the common interface include two (580, 582, 1180, 1182) to three (880, 882) signal lines. The signal lines are unidirectional or bi-directional. A clock signal may be provided by dedicated signal line or recovered from frames carried by the signal lines. One embodiment includes a first device (522) coupled (710) to a second device (510) with a bi directional data line (574) and a clock line (572). Frames of data are serially communicated (720) between the first and second devices on the data line. Each frame is synchronized with a clock signal carried by the clock line. Each frame (602) has a portion allocated to data communicated from the first device to the second device and another portion allocated to data communicated from the second device to the first device.

    Abstract translation: 描述了在公共接口上传送PCM和SDI数据的方法和装置。 公共接口的各种实施例包括两个(580,582,1180,1182)到三个(880,882)信号线。 信号线是单向或双向的。 时钟信号可以由专用信号线提供或从信号线承载的帧中恢复。 一个实施例包括利用双向数据线(574)和时钟线(572)耦合(710)到第二设备(510)的第一设备(522)。 在数据线上的第一和第二设备之间串行地传送数据帧(720)。 每个帧与由时钟线承载的时钟信号同步。 每个帧(602)具有分配给从第一设备传送到第二设备的数据的部分,以及分配给从第二设备传送到第一设备的数据的另一部分。

    PRECISION OSCILLATOR HAVING LINBUS CAPABILITIES
    18.
    发明申请
    PRECISION OSCILLATOR HAVING LINBUS CAPABILITIES 审中-公开
    具有LINBUS能力的精密振荡器

    公开(公告)号:WO2008083329A3

    公开(公告)日:2009-04-16

    申请号:PCT/US2007089122

    申请日:2007-12-28

    CPC classification number: H03K3/0231 H03K3/356113 H03K5/2481

    Abstract: The integrated system on a chip with LINBUS network communication capabilities includes processing circuitry for performing predefined digital processing functionalities on the chip. A free running clock circuit generates a temperature compensated clock that does not require a synch signal from external to the chip. A LINBUS network communications interface digitally communicates with off-chip LINBUS devices. Communication between said on-chip LINBUS communications interface and the off-chip LINBUS devices is affected without clock recovery. The LINBUS network communication interface has a time base derived from the temperature compensated clock which is independent of any timing information in the input data received during a receive operation. The temperature compensated clock further provides an on-chip time reference for both the processing circuitry and the LINBUS network communications interface.

    Abstract translation: 具有LINBUS网络通信能力的芯片集成系统包括用于在芯片上执行预定义的数字处理功能的处理电路。 自由运行的时钟电路产生温度补偿时钟,不需要来自芯片外部的同步信号。 LINBUS网络通信接口与片外LINBUS设备进行数字通信。 所述片上LINBUS通信接口和片外LINBUS器件之间的通信不受时钟恢复的影响。 LINBUS网络通信接口具有从温度补偿时钟导出的时基,其独立于在接收操作期间接收的输入数据中的任何定时信息。 温度补偿时钟还为处理电路和LINBUS网络通信接口提供片上时间参考。

    SYSTEM AND METHOD FOR VOLTAGE PROTECTION IN A POWERED DEVICE
    19.
    发明申请
    SYSTEM AND METHOD FOR VOLTAGE PROTECTION IN A POWERED DEVICE 审中-公开
    用于电力设备中的电压保护的系统和方法

    公开(公告)号:WO2008005463A3

    公开(公告)日:2009-01-29

    申请号:PCT/US2007015416

    申请日:2007-06-29

    CPC classification number: H02H9/046

    Abstract: A powered device includes a voltage protection circuit, two outputs, a switch, and a snubber circuit. The two outputs of the integrated circuit maybe coupled to an external transformer. The snubber circuit of the integrated circuit is responsive to the switch and is coupled with respect to the two outputs to direct energy from at least one of the two outputs to the voltage protection circuit.

    Abstract translation: 电源设备包括电压保护电路,两个输出,开关和缓冲电路。 集成电路的两个输出可以耦合到外部变压器。 集成电路的缓冲电路响应于开关并且相对于两个输出端耦合以将来自两个输出中的至少一个的能量引导到电压保护电路。

    A ROTATING HARMONIC REJECTION MIXER
    20.
    发明申请
    A ROTATING HARMONIC REJECTION MIXER 审中-公开
    旋转谐波抑制混合器

    公开(公告)号:WO2009006189A2

    公开(公告)日:2009-01-08

    申请号:PCT/US2008068312

    申请日:2008-06-26

    Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.

    Abstract translation: 在一个实施例中,本发明包括一个混频器电路,用于接收和产生来自射频(RF)信号和主时钟信号的混合信号,耦合到混频器电路的输出的开关级,以将混合信号旋转切换到 耦合到开关级的多个增益级,以及组合器,以组合增益级的输出。

Patent Agency Ranking