公开(公告)号：WO2015031115A1

公开(公告)日：2015-03-05

申请号：PCT/US2014/051758

申请日：2014-08-19

Applicant: QUALCOMM INCORPORATED

Inventor： SENGOKU, Shoichiro ,  WIETFELDT, Richard Dominic ,  WILEY, George Alan

IPC: G06F13/26

CPC classification number: G06F13/4226 ,  G06F13/22 ,  G06F13/24 ,  G06F13/26 ,  G06F2211/001 ,  G06F2211/002

Abstract: A master device is provided which is coupled to a shared single line interrupt request (IRQ) bus and a control data bus. The master device group slave devices coupled to the shared single line IRQ bus into one or more groups, where each group is associated with a different IRQ signal. The master device then monitors the IRQ bus to ascertain when an IRQ signal is asserted by at least one slave device. The master device then identifies a group to with which the IRQ signal is associated. The slave devices for the identified group are then scanned or queried by the master device to ascertain which slave device asserted the IRQ signal on the IRQ bus. Each group uses a distinguishable IRQ signal to allow the master device to ascertain which group to query or scan.

Abstract translation: 提供了一个主器件，其耦合到共享单线中断请求（IRQ）总线和控制数据总线。 主设备组从设备将共享单线IRQ总线耦合到一个或多个组中，其中每个组与不同的IRQ信号相关联。 然后，主设备监视IRQ总线以确定至少一个从设备何时确定IRQ信号。 然后，主设备识别与IRQ信号相关联的组。 然后，由主设备扫描或查询所识别的组的从设备，以确定哪个从设备在IRQ总线上断言IRQ信号。 每个组使用可区分的IRQ信号来允许主设备确定哪个组进行查询或扫描。

公开(公告)号：WO2015013259A1

公开(公告)日：2015-01-29

申请号：PCT/US2014/047586

申请日：2014-07-22

Applicant: QUALCOMM INCORPORATED

Inventor： LEE, Chulkyu ,  WILEY, George Alan ,  WIETFELDT, Richard Dominic

IPC: G06F13/42 ,  H04L7/00

CPC classification number: H04L7/033 ,  G06F13/4295 ,  H04B3/50 ,  H04L7/00 ,  H04L7/0037 ,  H04L7/0041

Abstract: Systems and methods for multi-phase signaling are described herein. In one embodiment, a method for receiving data comprises receiving a sequence of symbols from a plurality of conductors (510), and generating a clock signal by detecting transitions in the received sequence of symbols (520). The method also comprises delaying the received sequence of symbols (522), and capturing one or more symbols in the delayed sequence of symbols using the clock signal, wherein a previous symbol in the delayed sequence of symbols is captured using a clock pulse in the clock signal generated based on a detected transition to a current symbol in the received sequence of symbols (530).

Abstract translation: 本文描述了用于多相信令的系统和方法。 在一个实施例中，用于接收数据的方法包括从多个导体（510）接收符号序列，以及通过检测所接收的符号序列（520）中的转变来产生时钟信号。 该方法还包括延迟接收到的符号序列（522），并使用时钟信号捕获延迟符号序列中的一个或多个符号，其中使用时钟脉冲在时钟序列中捕获延迟符号序列中的先前符号 基于在所接收的符号序列（530）中检测到的当前符号的转换而产生的信号。

公开(公告)号：WO2015013254A1

公开(公告)日：2015-01-29

申请号：PCT/US2014/047571

申请日：2014-07-22

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan ,  LEE, Chulkyu

IPC: G06F13/42 ,  H04L25/02

CPC classification number: H04L7/033 ,  G06F13/4295 ,  H04B3/02 ,  H04L7/0004 ,  H04L7/0337 ,  H04L25/0272 ,  H04L25/0292 ,  Y02D10/14 ,  Y02D10/151

Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. A clock recovery circuit may be calibrated based on state transitions in a preamble transmitted on two or more connectors. A calibration method is described. The method includes detecting a plurality of transitions in a preamble of a multiphase signal and calibrating a delay element to provide a delay that matches a clocking period of the multiphase signal. Each transition may be detected by only one of a plurality of detectors. The delay element may be calibrated based on time intervals between detections of successive ones of the plurality of transitions.

Abstract translation: 描述了促进数据传输的系统，方法和装置，特别是在电子设备内的两个设备之间。 信息以N相极性编码符号发送。 时钟恢复电路可以基于在两个或更多个连接器上发送的前置码中的状态转换来校准。 描述校准方法。 该方法包括检测多相信号的前导码中的多个转换并校准延迟元件以提供与多相信号的计时周期匹配的延迟。 每个转换可以仅由多个检测器中的一个检测。 延迟元件可以基于多个转换中的连续检测之间的时间间隔进行校准。

公开(公告)号：WO2013138478A1

公开(公告)日：2013-09-19

申请号：PCT/US2013/030937

申请日：2013-03-13

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan ,  RASKIN, Glenn D.

IPC: H04L25/02

CPC classification number: G08C19/16 ,  H04L25/0272

Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Data is selectively transmitted as N-phase polarity encoded symbols or as packets on differentially driven connectors. A data transfer method comprises encoding data and control signals in a sequence of symbols to be transmitted on a plurality of connectors, and transmitting the sequence of symbols on the plurality of connectors. Each symbol may be transmitted using a combination of a phase state of a first pair of connectors, a polarity of a second pair of connectors, and a selection of at least one undriven connector. Transmission of each symbol in the sequence of symbols may cause a change of state for at least one of the plurality of connectors.

Abstract translation: 描述了促进数据传输的系统，方法和装置，特别是在电子设备内的两个设备之间。 选择性地将数据作为N相极性编码的符号或作为差分驱动的连接器上的分组发送。 数据传输方法包括以多个连接器传输的符号序列中的数据和控制信号进行编码，以及在多个连接器上发送符号序列。 可以使用第一对连接器的相位状态，第二对连接器的极性和至少一个未驱动连接器的选择的组合来发送每个符号。 符号序列中的每个符号的传输可能导致多个连接器中的至少一个连接器的状态改变。

公开(公告)号：WO2006099327A1

公开(公告)日：2006-09-21

申请号：PCT/US2006/008955

申请日：2006-03-10

Applicant: QUALCOMM INCORPORATED ,  WALKER, Gordon Kent ,  WILEY, George Alan ,  RAVEENDRAN, Vijayalakshmi R.

Inventor： WALKER, Gordon Kent ,  WILEY, George Alan ,  RAVEENDRAN, Vijayalakshmi R.

IPC: H04L29/06

CPC classification number: H04L29/06027 ,  H04L65/602 ,  H04L65/604 ,  H04L65/605 ,  H04L65/607 ,  H04L65/80 ,  H04N21/2335 ,  H04N21/234336 ,  H04N21/23608 ,  H04N21/242 ,  H04N21/4305 ,  H04N21/4344 ,  H04N21/6131 ,  H04N21/8106 ,  H04N21/8547

Abstract: Methods and apparatus for providing power efficient time management for mobile media. In an aspect, a method is provided that operates to provide time management for mobile media that is distributed over a network. The method includes receiving the mobile media comprising source video frames that are associated with a source time reference (402) , and capturing a portion of the source video frames (404) . The method also includes re-labeling the portion of the source video frames based on a system time reference (406) to produce synchronized video frames, wherein the network provides communications based on the system time reference, and assembling a transmission frame that comprises the synchronized video frames (410) .

Abstract translation: 为移动媒体提供功率有效的时间管理的方法和设备。 在一方面，提供了一种操作以为通过网络分发的移动媒体提供时间管理的方法。 该方法包括接收包括与源时间基准相关联的源视频帧（402）的移动媒体，以及捕获源视频帧（404）的一部分。 该方法还包括基于系统时间参考（406）重新标记源视频帧的部分以产生同步的视频帧，其中网络基于系统时间参考提供通信，以及组合包括同步的传输帧 视频帧（410）。

公开(公告)号：WO2022086642A1

公开(公告)日：2022-04-28

申请号：PCT/US2021/049906

申请日：2021-09-10

Applicant: QUALCOMM INCORPORATED

Inventor： MISHRA, Lalan Jee ,  WIETFELDT, Richard Dominic ,  WILEY, George Alan ,  PITIGOI-ARON, Radu

IPC: H04L25/49

Abstract: Pulse amplitude modulation (PAM) encoding for a communication bus is disclosed. In particular, various two-wire communication buses may encode bits using three-level PAM (PAM-3) or five-level PAM (PAM-5) to increase bit transmission without requiring increases to clock frequencies or adding additional pins. Avoiding increases in clock frequencies helps reduce the risk of electromagnetic interference (EMI), and avoiding use of extra pins avoids cost increases for integrated circuits (ICs).

公开(公告)号：WO2019240853A1

公开(公告)日：2019-12-19

申请号：PCT/US2019/019265

申请日：2019-02-22

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan ,  LEE, Chulkyu

IPC: H04L7/033 ,  H04L7/00 ,  G06F13/42 ,  H04L25/49

Abstract: Methods, apparatus, and systems for data communication over a multi-wire, multi-phase interface are disclosed. A method includes recovering a first clock signal from transitions between pairs of symbols representative of successive signaling states of a 3-wire interface, where a pulse in the first clock signal is generated in response to an earliest-occurring transition between the first and second symbols in one of three difference signals representative of differences in state between two wires, determining direction of voltage change of a first transition detected on a first difference signal, providing a value selected based on the direction of voltage change as value of the first difference signal in the second symbol, and providing a value of a second difference signal captured during the first symbol as the value of the second difference signal when the second difference signal does not transition between the first symbol and the second symbol.

公开(公告)号：WO2015021262A1

公开(公告)日：2015-02-12

申请号：PCT/US2014/050118

申请日：2014-08-07

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan ,  LEE, Chulkyu

IPC: H04L25/02 ,  H04L25/14 ,  H04L25/49

CPC classification number: H04L1/0056 ,  H04L1/0014 ,  H04L25/0272 ,  H04L25/14 ,  H04L25/49 ,  H04L43/0811

Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. The apparatus may determine whether a run-length violation will occur or is likely to occur if a first sequence of symbols provided by a mapper of an M-Wire N-Phase encoder is transmitted on a plurality of wires. A second sequence of symbols may be substituted for the first sequence of symbols. The second sequence of symbols may comprise a surplus sequence of symbols that is not used for mapping data in the mapper.

Abstract translation: 描述了促进数据传输的系统，方法和装置，特别是在电子设备内的两个设备之间。 如果由M-Wire N相编码器的映射器提供的第一符号序列在多条导线上发送，则该装置可以确定是否发生行程长度违规或可能发生。 符号的第二序列可以代替第一符号序列。 第二符号序列可以包括不用于映射器中的数据的多余符号序列。

公开(公告)号：WO2014201293A1

公开(公告)日：2014-12-18

申请号：PCT/US2014/042188

申请日：2014-06-12

Applicant: QUALCOMM INCORPORATED

Inventor： SENGOKU, Shoichiro ,  WILEY, George Alan ,  CHEUNG, Joseph

IPC: G06F13/42

CPC classification number: G06F13/4291 ,  G06F13/364 ,  G06F13/4282 ,  G06F13/4295 ,  H04L7/0331

Abstract: System, methods and apparatus are described that offer improved performance of a serial bus used for Inter-Integrated Circuit (I2C) and/or camera control interface (CCI) operations. CCI extension (CCIe) devices are described. CCIe devices may be configured as a bus master or as a slave. In one method, a CCIe transmitter may generate a transition number from a set of bits, convert the transition number into a sequence of symbols, and transmit the sequence of symbols in the signaling state of a two-wire serial bus. Timing information may be encoded in the transitions between symbols of consecutive pairs of symbols in the sequence of symbols. For example, each transition may cause a change in the signaling state of at least one wire of the two-wire serial bus. A CCIe receiver may derive a receive clock from the transitions in order to receive and decode the sequence of symbols.

Abstract translation: 描述了提供用于集成电路间（I2C）和/或相机控制接口（CCI）操作的串行总线的改进性能的系统，方法和设备。 描述了CCI扩展（CCIe）设备。 CCIe设备可以配置为总线主设备或从设备。 在一种方法中，CCIe发射机可以从一组比特中生成转换号码，将转换号码转换成符号序列，并且在双线串行总线的信令状态下发送符号序列。 定时信息可以在符号序列中的连续码元对符号之间的转换中编码。 例如，每个转换可能导致双导线串行总线的至少一条导线的信号状态的改变。 CCIe接收器可以从转换中获得接收时钟，以接收和解码符号序列。

公开(公告)号：WO2014150984A1

公开(公告)日：2014-09-25

申请号：PCT/US2014/024704

申请日：2014-03-12

Applicant: QUALCOMM INCORPORATED

Inventor： SENGOKU, Shoichiro ,  WILEY, George Alan ,  CHEUNG, Joseph

IPC: G06F13/42 ,  G06F13/40 ,  H04L25/00

CPC classification number: H04L7/027 ,  G06F13/4072 ,  G06F13/4295 ,  H04L25/00 ,  H04L25/14

Abstract: System, methods and apparatus are described that facilitate transmission of data over a multi-wire data communications link, particularly between two devices within an electronic apparatus. A sequence of data bits is converted into M transition numbers, which are then converted into a sequence of symbols. The sequence of symbols is transmitted received over N wires. A clock signal may be effectively embedded in the transmission of the sequence of symbols. Each of the sequence of symbols may be selected based on a corresponding one of the M transition numbers and a value of a preceding one of the sequence of symbols.

Abstract translation: 描述了便于通过多线数据通信链路，特别是在电子设备内的两个设备之间传输数据的系统，方法和装置。 数据比特序列被转换成M个转换号码，然后转换成符号序列。 符号序列通过N线传输。 时钟信号可以被有效地嵌入在符号序列的传输中。 符号序列中的每一个可以基于M个转换号中的一个和符号序列中的前一个的值来选择。