公开(公告)号：WO2017156485A1

公开(公告)日：2017-09-14

申请号：PCT/US2017/021955

申请日：2017-03-10

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan

IPC: H04L7/10 ,  H04L25/14 ,  G06F13/42 ,  H04L25/49

CPC classification number: H04B17/21 ,  G06F13/4295 ,  H04L7/10 ,  H04L25/03273 ,  H04L25/14 ,  H04L25/49

Abstract: Methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. In particular, a preamble for transmission in a sequence of symbols over a multi-wire communications interface, such as a MIPI C-PHY interface, is constructed to include one or more symbols each having a single state transition symbols for signaling a particular calibration preamble from a transmitter to a receiver over the multi-wire communications interface. The preamble, having only single state transition symbols, improves reliability of decoding the symbols at a receiver, including reception and decoding without the use of a calibration clock.

Abstract translation: 描述了促进数据传输的方法和设备，特别是在电子设备内的两个设备之间。 具体而言，用于通过多线通信接口（诸如MIPI C-PHY接口）在符号序列中传输的前导码被构造为包括一个或多个符号，每个符号具有单个状态转换符号以用于用信号通知特定校准前导码 通过多线通信接口从发射机到接收机。 只有单个状态转换符号的前导码提高了在接收器处解码符号的可靠性，包括接收和解码，而无需使用校准时钟。

公开(公告)号：WO2017023498A1

公开(公告)日：2017-02-09

申请号：PCT/US2016/041786

申请日：2016-07-11

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan ,  KWON, Ohjoon

IPC: H04L7/00 ,  H04L25/49

CPC classification number: H04L7/0087 ,  H04B1/40 ,  H04L7/0083 ,  H04L25/14 ,  H04L25/4923 ,  H04L27/0002 ,  H04L27/20 ,  H04L27/227

Abstract: Systems, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Two Integrated Circuit (IC) devices may be collocated in an electronic apparatus and communicatively coupled through a 3-wire, 3-phase interface. A data transfer method operational on a first of the two or more devices includes determining presence of a misalignment of the 3-wire communication link involving two or more wires, and inverting a first bit of a 3-bit symbol encoded in a transition of signaling state of the 3-wire communication link when the misalignment of the 3-wire communication link is determined to affect phase relationships between two or more signals carried on the three wires, such that inverting the first bit corrects the phase relationships between the two or more signals. A version of the 3-phase signal may be communicated in a different phase state through each of three wires.

Abstract translation: 描述了促进数据传输的系统，方法和装置，特别是在电子设备内的两个设备之间。 两个集成电路（IC）器件可以并置在电子设备中并且通过3线，3相接口通信耦合。 在两个或更多个设备中的第一个上可操作的数据传输方法包括确定存在涉及两条或更多条导线的3线通信链路的未对准，并且反转在信令转换中编码的3位符号的第一位 当确定3线通信链路的未对准被确定为影响在三条线路上承载的两个或更多个信号之间的相位关系时，3线通信链路的状态，使得反转第一比特校正两个或更多个之间的相位关系 信号。 三相信号的版本可以通过三条线中的每一条以不同的相位状态通信。

公开(公告)号：WO2017019223A1

公开(公告)日：2017-02-02

申请号：PCT/US2016/039667

申请日：2016-06-27

Applicant: QUALCOMM INCORPORATED

Inventor： SEJPAL, Dhaval ,  LEE, Chulkyu ,  WILEY, George Alan

IPC: H04L25/02 ,  H04L7/00 ,  H04L25/49 ,  H04L7/033 ,  H04L25/14

CPC classification number: H04B3/54 ,  H04B3/462 ,  H04L7/0087 ,  H04L7/033 ,  H04L25/0286 ,  H04L25/14 ,  H04L25/4917

Abstract: A method, an apparatus, and a computer program product for data communication over a multi-wire, multi-phase interface are provided. The method may include providing a sequence of symbols to be transmitted on a 3-wire interface, each symbol in the sequence of symbols defining one of three voltage states for each wire of the 3-wire interface, driving all wires of the 3-wire interface to a common voltage state during a transition from a first transmitted symbol to a second transmitted symbol, driving each wire of the 3-wire interface in accordance with the second transmitted symbol after a predetermined delay. Each wire may be in a different voltage state from the other wires of the 3-wire interface during transmission of the each symbol. The common voltage state may lie between two of the three voltage states.

Abstract translation: 提供了一种用于通过多线，多相接口进行数据通信的方法，装置和计算机程序产品。 该方法可以包括提供要在3线接口上发送的符号序列，符号序列中的每个符号定义3线接口的每根线的三种电压状态之一，驱动3线的所有线 在从第一传输符号到第二传输符号的转变期间接合到公共电压状态，在预定延迟之后根据第二传输符号驱动3线接口的每条线。 在每个符号的传输期间，每根导线可能处于与3线接口的其它线不同的电压状态。 公共电压状态可以位于三个电压状态中的两个之间。

公开(公告)号：WO2016137703A1

公开(公告)日：2016-09-01

申请号：PCT/US2016/016454

申请日：2016-02-03

Applicant: QUALCOMM INCORPORATED

Inventor： MISHRA, Lalan Jee ,  WIETFELDT, Richard Dominic ,  WILEY, George Alan

IPC: G06F13/38

CPC classification number: G06F5/16 ,  G06F1/12 ,  G06F5/065 ,  G06F13/1673 ,  G06F13/385 ,  G06F13/4022

Abstract: A line multiplexed UART interface is provided that multiplexes a UART transmit and CTS functions on a transmit pin and that multiplexes a UART receive and RTS functions on a receive pin. In this fashion, the conventional need for an additional RTS pin and an additional CTS pin is obviated such that the line multiplexed UART interface uses just the transmit pin and the receive pin.

Abstract translation: 提供了一种线路复用UART接口，可在发送引脚上复用UART发送和CTS功能，并在接收引脚上复用UART接收和RTS功能。 以这种方式，消除了额外的RTS引脚和附加CTS引脚的常规需求，使得线路复用UART接口仅使用发送引脚和接收引脚。

公开(公告)号：WO2015077562A1

公开(公告)日：2015-05-28

申请号：PCT/US2014/066814

申请日：2014-11-21

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan ,  HIRSCH, Olaf Josef ,  WIETFELDT, Richard Dominic

IPC: G06F13/376 ,  H04L12/413

CPC classification number: H04W52/18 ,  H04L12/4015 ,  H04L12/413 ,  H04W52/54 ,  H04W88/02

Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Each device can contend for control of a communications link by driving a data signal to a first voltage level. If the data signal or a clock signal changes before an arbitration time period has elapsed, one or more devices yield control of the communications link to another contender. The arbitration time period for each contender is different and indicates a priority of the message to be transmitted. A shorter arbitration time period indicates higher priority. Arbitration may commence after clock and data signals of the communications link remain in an idle or other predefined state for a minimum idle time. The minimum idle time may be different for different nodes and may be shorter for high priority messages or nodes.

Abstract translation: 描述了促进数据传输的系统，方法和装置，特别是在电子设备内的两个设备之间。 每个设备可以通过将数据信号驱动到第一电压电平来争取控制通信链路。 如果在仲裁时间段过去之前数据信号或时钟信号改变，则一个或多个设备产生对另一个竞争者的通信链路的控制。 每个竞争者的仲裁时间段不同，表示要发送的消息的优先级。 较短的仲裁时间段表示优先级较高。 仲裁可以在通信链路的时钟和数据信号保持在空闲或其他预定义状态中达到最小空闲时间之后开始。 不同节点的最小空闲时间可能不同，对于高优先级消息或节点可能较短。

公开(公告)号：WO2015054297A1

公开(公告)日：2015-04-16

申请号：PCT/US2014/059548

申请日：2014-10-07

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan ,  LEE, Chulkyu

IPC: H04L1/24 ,  H04L1/20

CPC classification number: H04L7/042 ,  H04L1/205 ,  H04L1/206 ,  H04L1/247 ,  H04L5/20 ,  H04L25/0272 ,  H04L25/0282 ,  H04L25/0294 ,  H04L25/0298 ,  H04L25/4917

Abstract: System, methods and apparatus are described that facilitate tests and measurements related to multi-wire, multi-phase communications links. Information is transmitted in N-phase polarity encoded symbols and an eye pattern corresponding to the symbols is generated such that the symbols are aligned with a trigger for each symbol that corresponds to a clock edge used to sample the symbols. The eye pattern may be used to determine sufficiency of setup times in the communication links and other such characteristics defining a communications channel capabilities.

Abstract translation: 描述了便于与多线，多相通信链路相关的测试和测量的系统，方法和装置。 信息以N相极性编码的符号发送，并且生成与符号相对应的眼图，使得符号与对应于用于采样符号的时钟边缘的每个符号的触发对齐。 眼图可以用于确定通信链路中的建立时间的充分性以及定义通信信道能力的其它这样的特性。

公开(公告)号：WO2007149872A2

公开(公告)日：2007-12-27

申请号：PCT/US2007/071585

申请日：2007-06-19

Applicant: QUALCOMM Incorporated ,  WILEY, George Alan

Inventor： WILEY, George Alan

IPC: H03M11/24

CPC classification number: H03M11/24 ,  H03M11/20

Abstract: A first current is driven through a first current path from a first common node, through a key matrix, and to a second common node when a key is pressed. A first measurement of the first current path resistance is made. A second current is then driven through a second current path from the second common node, through the key matrix, and to the first common node. A second measurement of the second current path resistance is made. The first and second measurements are used to identify the key that was pressed. Each key corresponds to a unique pair of first and second measurement values. In one example, non-linear resistance circuits are disposed at the ends of the row and column conductors of the key matrix such that a row resistor in the first current path is measured independently of a column resistor in the second current path.

Abstract translation: 当按下一个键时，第一电流通过第一公共节点通过键矩阵的第一电流路径被驱动，并被驱动到第二公共节点。 进行第一电流通路电阻的第一测量。 然后，第二电流通过来自第二公共节点的第二电流路径，通过键矩阵和第一公共节点驱动。 进行第二电流通路电阻的第二测量。 第一次和第二次测量用于识别按下的键。 每个键对应于一对唯一的第一和第二测量值。 在一个示例中，非线性电阻电路设置在键矩阵的行和列导体的端部处，使得第一电流路径中的行电阻器独立于第二电流路径中的列电阻器被测量。

公开(公告)号：WO2021034503A1

公开(公告)日：2021-02-25

申请号：PCT/US2020/045041

申请日：2020-08-05

Applicant: QUALCOMM INCORPORATED

Inventor： LEE, Chulkyu ,  SEJPAL, Dhaval ,  WILEY, George Alan

IPC: H04L25/02 ,  H04L25/49

Abstract: Certain disclosed methods, apparatus, and systems enable improved communication on a multiphase communication link through improved encoding techniques and protocol. A data communication apparatus has a plurality of line drivers configured to couple the apparatus to a 3-wire link, and a data encoder configured to encode at least 3 bits of binary data in each transition between two symbols that are consecutively transmitted by the plurality of line drivers over the 3-wire link such that each pair of consecutively-transmitted symbols comprises two different symbols. Each symbol defines signaling states of the 3-wire link during an associated symbol transmission interval such that each wire of the 3-wire link is in a different signaling state from the other wires of the 3-wire link during the associated symbol transmission interval. Data may be encoded using a combination of 3-phase and pulse amplitude modulation.

公开(公告)号：WO2019060198A1

公开(公告)日：2019-03-28

申请号：PCT/US2018/050694

申请日：2018-09-12

Applicant: QUALCOMM INCORPORATED

Inventor： WILEY, George Alan

IPC: H04L25/02 ,  H04L25/49

Abstract: Systems, methods and apparatus facilitate transmission of data between two devices. An apparatus has a bus interface, a three-phase encoder, and a processing circuit that can configure the three-phase encoder for a first mode of operation in which data is encoded in a sequence of two-bit symbols, transmit a first three-phase signal representative of the sequence of two-bit symbols on each of the three wires. The processing circuit may be configured to configure the 3-phase encoder for a second mode of operation in which data is encoded in a sequence of three-bit symbols. Three-phase signal representative of the sequence of two-bit symbols or sequence of three-bit symbols on each of three wires, where a three-phase signal is in a different phase on each wire when transmitted, and a transition in signaling state occurs between transmission of each pair of symbols.

公开(公告)号：WO2015035380A1

公开(公告)日：2015-03-12

申请号：PCT/US2014/054778

申请日：2014-09-09

Applicant: QUALCOMM INCORPORATED

Inventor： SENGOKU, Shoichiro ,  WIETFELDT, Richard Dominic ,  WILEY, George Alan

IPC: G06F13/36

CPC classification number: G06F13/378 ,  G06F13/24 ,  G06F13/36 ,  G06F13/362 ,  G06F2213/3602

Abstract: To accommodate multiple masters over bus architectures supporting a single master device, a mechanism is provided for an inactive master device to trigger an IRQ signal over a shared, single line IRQ bus. A current master then polls the other inactive master devices over a shared data bus to ascertain which inactive master device is asserting the IRQ signal. Upon identifying the asserting inactive master device, the current master device grants control of the data bus to the new master device, thereby making the inactive master the new active master device.

Abstract translation: 为了通过支持单个主器件的总线架构来容纳多个主器件，为非激活主器件提供了通过共享的单线IRQ总线触发IRQ信号的机制。 然后当前主机通过共享数据总线轮询其他无效主设备，以确定哪个无效主设备正在断言IRQ信号。 当识别出断言无效的主设备时，当前的主设备将数据总线的控制权授予新的主设备，从而使非活动主设备成为新的主主设备。