公开(公告)号：WO2006073800A2

公开(公告)日：2006-07-13

申请号：PCT/US2005/046086

申请日：2005-12-20

Applicant: ESS TECHNOLOGY, INC. ,  TOROS, Zeynep ,  MANN, Richard ,  BENCUYA, Selim

Inventor： TOROS, Zeynep ,  MANN, Richard ,  BENCUYA, Selim

IPC: H04N5/335

CPC classification number: H01L27/14603 ,  H01L27/14609 ,  H01L27/14643 ,  H01L27/14689 ,  H04N5/3575 ,  H04N5/3597 ,  H04N5/361

Abstract: An improved CMOS sensor integrated circuit is disclosed, along with methods of making the circuit and computer readable descriptions of the circuit.

Abstract translation: 公开了一种改进的CMOS传感器集成电路，以及制作电路的电路和计算机可读描述的方法。

公开(公告)号：WO2006060307A2

公开(公告)日：2006-06-08

申请号：PCT/US2005/042884

申请日：2005-11-25

Applicant: ESS TECHNOLOGY, INC. ,  ZHANG, Zhihong ,  LUO, Jiafu

Inventor： ZHANG, Zhihong ,  LUO, Jiafu

IPC: H04N5/335 ,  H04N3/14

CPC classification number: H04N5/3658

Abstract: An apparatus and method for determining a reference value for an imaging device, having a plurality of photosensitive pixels arranged in rows and columns, and having an active data portion and at least one row of pixels outside the active data portion. The method includes operating the at least one row for a predetermined integration time, applying a first reference value to the pixels ini the at least one row, reading out at least one pixel from the at least one row to obtain a first output value, applying a second reference value to the pixels in the at least one row; reading out at least one pixel from the at least one row to obtain a second output value, determining the reference value corresponding to an intended output; and applying the determined reference value to the active data portion of the imaging device.

Abstract translation: 一种用于确定成像装置的基准值的装置和方法，所述成像装置具有排列成行和列的多个光敏像素，并且在活动数据部分的外部具有活动数据部分和至少一行像素。 该方法包括操作至少一行预定的积分时间，将第一参考值应用于至少一行中的像素，从至少一行读出至少一个像素以获得第一输出值，应用 对所述至少一行中的像素的第二参考值; 从所述至少一行读出至少一个像素以获得第二输出值，确定对应于预期输出的参考值; 以及将所确定的参考值应用于所述成像装置的活动数据部分。

公开(公告)号：WO2004095704A3

公开(公告)日：2005-10-20

申请号：PCT/US0338911

申请日：2003-12-08

Applicant: ESS TECHNOLOGY INC ,  MALLINSON ANDREW MARTIN

Inventor： MALLINSON ANDREW MARTIN

IPC: H03M3/02 ,  H03M3/00

CPC classification number: H03M7/3015 ,  H03M3/39 ,  H03M3/50 ,  H03M7/3028

Abstract: A sigma delta circuit is provided having a sigma delta modulator (100) configured to operate according to a first clock signal (108) and a quantizer (110) connected to the sigma delta modulator, where the quantizer (110) is configured to operate according to a second clock signal (112). In operation, if a small amplitude signal is received by the sigma delta circuit, the circuit is configured to adjust to a different frequency to accommodate the larger signal. When a large amplitude signal is received, the circuit is configured to adjust to a different frequency to accommodate the larger signal. The second clock signal (112) may be a variable clock signal, where the quantizer (110) operates according to a variable clock signal in order to adjust to different input signals.

Abstract translation: 提供了一种Σ-Δ电路，其具有被配置为根据连接到Σ-Δ调制器的第一时钟信号（108）和量化器（110）进行操作的Σ-Δ调制器（100），其中量化器（110）被配置为根据 到第二时钟信号（112）。 在操作中，如果Σ-Δ电路接收到小振幅信号，则电路被配置成调节到不同的频率以适应较大的信号。 当接收到大振幅信号时，电路被配置成调节到不同的频率以适应较大的信号。 第二时钟信号（112）可以是可变时钟信号，其中量化器（110）根据可变时钟信号操作，以便调整到不同的输入信号。

公开(公告)号：WO2005060230A2

公开(公告)日：2005-06-30

申请号：PCT/US2004/041294

申请日：2004-12-10

Applicant: ESS TECHNOLOGY, INC. ,  BENCUYA, Selim, S. ,  LUO, Jiafu ,  MANN, Richard, A.

Inventor： BENCUYA, Selim, S. ,  LUO, Jiafu ,  MANN, Richard, A.

IPC: H04N

CPC classification number: H01L27/14603 ,  H01L27/14643 ,  H01L27/14654 ,  H04N5/347 ,  H04N5/3591 ,  H04N5/363 ,  H04N5/37457

Abstract: The present invention relates to devices and methods for image sensing. In one aspect, the present invention relates to a device including a plurality of pixels, wherein each pixel includes a charge transfer device and photodetector, and each of the pixels has a pitch of about microns or less. This aspect further includes a select transistor, a reset transistor, a source follower transistor, and a sense node, wherein the select transistor, the reset transistor, the source follower transistor, and the sense node are shared by the plurality of pixels.

Abstract translation: 本发明涉及用于图像感测的装置和方法。 一方面，本发明涉及包括多个像素的装置，其中每个像素包括电荷转移装置和光电检测器，并且每个像素具有约微米或更小的间距。 该方面还包括选择晶体管，复位晶体管，源极跟随器晶体管和感测节点，其中选择晶体管，复位晶体管，源极跟随器晶体管和感测节点由多个像素共享。

公开(公告)号：WO2005027341A1

公开(公告)日：2005-03-24

申请号：PCT/US2003/040134

申请日：2003-12-09

Applicant: ESS TECHNOLOGY, INC. ,  MALLINSON, Andrew, Martin

Inventor： MALLINSON, Andrew, Martin

IPC: H03G3/00

CPC classification number: H03G7/007

Abstract: A circuit and related method for digital volume control are provided, where the circuit includes a digital filter configured to process samples of an input stream in a manner that processes a previous input sample during a time interval before a subsequent input sample, and outputs a series of exponentially decaying waveforms. The result is an exponential response to a volume change made by a user, where the change feels more pleasant and natural than a conventional linear response.

Abstract translation: 提供了一种用于数字音量控制的电路和相关方法，其中电路包括数字滤波器，其被配置为以在后续输入采样之间的时间间隔内处理先前输入采样的方式处理输入流的采样，并且输出一系列 指数衰减波形。 结果是对用户进行的音量变化的指数响应，其中变化比常规线性响应感觉更愉快和自然。

公开(公告)号：WO2004013896A3

公开(公告)日：2004-02-12

申请号：PCT/US2003/024220

申请日：2003-08-01

Applicant: ESS TECHNOLOGY, INC.

Inventor： CHAN, Ming, Hong ,  HUANG, Elim ,  HO, Andy

IPC: G06F3/00

Abstract: A method for controlling communication on a bus (60) connecting a first processor (10), a second processor (40), and a device (70). The method transmits a first control signal from the first processor (10) to the second processor (40) via a control signal line (30), causing a bus connection of the second processor (46) to enter a high-impedance state, transfers data between the device (70) and the first processor (10) via the bus (60), then setting a bus connection of the first processor (16) to the high-impedance state, and transmits a second control signal from the first processor (10) to the second processor (40) via the control signal line (30), causing the bus connection of the second processor (46) to exit the high-impedance state.

公开(公告)号：WO2003098644A3

公开(公告)日：2003-11-27

申请号：PCT/US2003/014949

申请日：2003-05-12

Applicant: ESS TECHNOLOGY, INC.

Inventor： DONG, Ping ,  COOKMAN, Jordan, C.

IPC: H04B3/00

Abstract: An electrical isolation barrier for use in a Data Access Arrangement uses a high frequency (HF) transformer (24) to provide isolation. An input signal (21), which may be analog or digital, is connected to a modulator (22). The analog output of the modulator (22) is connected to the input of the HF transformer (24). The output of the HF transformer (24) is connected to the input of a demodulator (26). Simple amplitude modulation can be used in the modulator (22) to modulate the input signal (21) to the frequency range of operation of the HF transliormer (24). A simple low pass filter may be incorporated in the demodulator (26) to remove harmonic distortion caused by the HF transformer (24). The output signal (27) of the demodulator (26) is substantially the same as input io signal (21).

公开(公告)号：WO2003075151A1

公开(公告)日：2003-09-12

申请号：PCT/US2003/005389

申请日：2003-02-21

Applicant: ESS TECHNOLOGY, INC.

Inventor： COOKMAN, Jordan, C. ,  DONG, Ping

IPC: G06F7/00

CPC classification number: G06F7/72 ,  G06F7/729 ,  H04L27/00

Abstract: A method and device (300) are provided that allow computation of multiple modulus conversion (MMC) outputs using little or no division operations. Instead of division operations, multiplication and logical shift operations (310) are used to produce pseudo-quotients and pseudo-remainders, which may be corrected in a final step to produce correct MMC outputs. This allows for more efficient implementation, since division is typically less efficient than multiplication and logical shift. The method and device operate on MMC inputs that may be partitioned into sub-quotients of varying numbers of digits in any numbering system (306). The multiplication and logical shift operations are performed on each of the sub-quotients according to a procedure derived from long-division techniques.

Abstract translation: 提供了一种方法和装置（300），其允许使用很少或没有分割操作来计算多模转换（MMC）输出。 代替分割操作，乘法和逻辑移位操作（310）用于产生伪商和伪余数，其可以在最终步骤中被校正以产生正确的MMC输出。 这允许更有效的实现，因为除法通常比乘法和逻辑移位效率低。 所述方法和装置对可以划分成任何编号系统中不同数字位数的子商品的MMC输入进行操作（306）。 根据从长分割技术导出的过程，对每个子商进行乘法和逻辑移位操作。

公开(公告)号：WO02060261A3

公开(公告)日：2002-10-17

申请号：PCT/US0202172

申请日：2002-01-26

Applicant: ESS TECHNOLOGY INC

Inventor： MALLINSON MARTIN

IPC: H03M1/12 ,  G06G7/19 ,  H03H17/06 ,  G01S5/08 ,  H04B7/185

CPC classification number: H03H15/00 ,  G06G7/1928

Abstract: An electronic filter operates as a correlator that provides a discrete approximation of an analog signal (Figure 1, 10, 11, 12, 13). The analog to digital conversion is integrated directly approximation calculation. An array of sample and hold circuits or single bit comparators provide outputs to a series of multipliers, the other input of which is a coefficient value of a Fourier series approximation of the desired frequency response. Each of the sample and hold circuits samples sequentially in time and holds its sample until the next cycle. Thus the sample point rotates in time through the array and each new sample is multiplied by a different coefficient. The output of the multipliers is summed for evaluation.

Abstract translation: 电子滤波器作为提供模拟信号的离散近似的相关器（图1,10,11,12,13）进行操作。 模数转换是直接逼近计算。 采样和保持电路或单比特比较器的阵列向一系列乘法器提供输出，其另一个输入是所需频率响应的傅立叶级数近似的系数值。 每个采样和保持电路在时间上依次进行采样，并保持其采样直到下一个周期。 因此，采样点在时间上通过阵列旋转，并且每个新采样乘以不同的系数。 乘法器的输出相加以进行求值。

公开(公告)号：WO2015100345A3

公开(公告)日：2015-09-03

申请号：PCT/US2014072197

申请日：2014-12-23

Applicant: ESS TECHNOLOGY INC

Inventor： MALLINSON A MARTIN

IPC: H02M3/156 ,  G05F1/56 ,  G05F1/618

CPC classification number: G05F1/575 ,  G05F1/618

Abstract: A voltage regulator for providing a constant voltage to a circuit is described in which a series regulator acts as the current source for a shunt regulator and the series regulator in turn is controlled by the current diverted from the output by the shunt regulator. The current being diverted by the shunt regulator is measured, either directly or by measuring a related operating parameter. When current below or above a certain desired amount is being diverted from the load by the shunt regulator, a signal is sent to the series regulator causing the series regulator to provide more or less current respectively, so that the shunt regulator again diverts the desired amount of current and the output voltage remains constant. This configuration results in efficiency near that of a series regulator while maintaining the better frequency response of a shunt regulator.

Abstract translation: 描述了用于向电路提供恒定电压的电压调节器，其中串联调节器用作分流调节器的电流源，并且串联调节器又由分流调节器从输出转移的电流控制。 由分流调节器转移的电流可以直接测量或通过测量相关的操作参数进行测量。 当低于或高于一定期望量的电流由分流调节器从负载转移时，信号被发送到串联调节器，使得串联调节器分别提供更多或更少的电流，使得并联调节器再次转移所需量 的电流和输出电压保持不变。 该配置导致效率接近串联调节器的效率，同时保持分流调节器的更好的频率响应。