Abstract:
A system and method for optical perception can include a current confining pixel (CCP) that includes a detector pair, the detector pair including a first detector and a second detector, coupled together in an inverse polarity configuration such that the current confining pixel defines a sense node and a reference node together forming a differential output across the pair of detectors. The system and method can include a plurality of CCPs arranged in a CCP array, coupled together in any suitable manner; receiving, at a current confining pixel (CCP), an input signal; generating a differential output signal based on the input signal; and, analyzing an output of a CCP.
Abstract:
An imaging device comprising a pixel substrate including pixel element circuitry, a logic substrate including read circuitry configured to receive an output signal voltage from the pixel element circuitry, and electrically-conductive material arranged between the pixel substrate and the logic substrate, wherein the electrically-conductive material is configured to transfer at least one reference voltage from the logic substrate to the pixel substrate, wherein the electrically-conductive material comprises a Cu-Cu bonding portion.
Abstract:
An image sensor is disclosed. The image sensor comprises an array of active pixel cells on a substrate. Each active pixel cell of the present embodiments has: a light detector, monolithically integrated with the substrate; and a signal processing circuit, monolithically integrated with the substrate in a region at least partially surrounding the light detector, and being in electronic communication with the light detector. The light detector and the signal processing circuit are optionally formed of different material systems. A lattice mismatch between the light detector and the substrate is optionally at least 10%.
Abstract:
A semiconductor sensor and energy collector device is configured to collect energy and simultaneously generate image data in a camera or other imaging device. The device includes an array of pixels that are divided into super pixel groups that include a predetermined number of pixels. In a first operating mode, a first set of the pixels in each super pixel operates as a photovoltaic energy collector while a second set of the pixels in each super pixel group operate as image data sensors. In a second operating mode, at least one pixel in each super pixel group that operates as a photovoltaic energy collector in the first operating mode operates as an additional image data sensor.
Abstract:
The invention relates to a structure of a semiconductor chip (100) comprising photosensitive elements (104) for image capturing. The semiconductor chip (100) comprises a set of photosensitive elements (104) for forming electric signals on the basis of electromagnetic radiation received by the photosensitive elements (104); and other electronic circuitry. A surface of the semiconductor chip comprises a first region (102) and a second region (110); and the set of photosensitive elements (104) is located in the first region (102) and the other electronic circuitry is located in the second region (110). The invention also relates to methods, apparatuses, and computer program products.
Abstract:
An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.
Abstract:
A hybrid pixel sensor array is provided. Each pixel of the array comprises: a sensor for generating an imaging signal; a Charged-Coupled Device (CCD) array, coupled to the sensor so as to receive samples from the imaging signal and configured for storage of a plurality of samples; and active CMOS circuitry, coupled to the CCD array for generating a pixel output signal from the stored samples. The sensors of the pixels are part of a sensor portion of the hybrid pixel sensor array that is separate from both the CCD array and active CMOS circuitry of the pixels.
Abstract:
A photodiode pixel structure for imaging short wave infrared (SWIR) and visible light built in a planar structure and may be used for one dimensional and two dimensional photodiode arrays. The photodiode arrays may be hybridized to a read out integrated circuit (ROIC), for example, a silicon complementary metal-oxide-semiconductor (CMOS) circuit. The photodiode in each pixel is buried under the surface and does not directly contact the ROIC amplification circuit. Charge is transferred form the detector using a junction field effect transistor (JFET) in each pixel. Disconnecting the photodiode from the ROIC amplification circuit enables low dark current as well as double correlated sampling in the pixel.