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    원칩 타입의 발광 소자 및 그 제조 방법
    61.
    发明申请
    원칩 타입의 발광 소자 및 그 제조 방법 审中-公开

    公开(公告)号：WO2019190090A1

    公开(公告)日：2019-10-03

    申请号：PCT/KR2019/003033

    申请日：2019-03-15

    Applicant: ㈜라이타이저

    Inventor： 민재식 ,  이재엽 ,  조병구

    IPC: H01L33/00 ,  H01L33/62 ,  H01L33/26 ,  H01L27/15 ,  H01L21/76

    Abstract: 본 발명에 의한 원칩 타입의 발광 소자 및 그 제조 방법이 개시된다. 본 발명의 일 실시예에 따른 원칩 타입의 발광 소자의 제조 방법은 성장 기판 상에서 발광층을 성장시키는 단계; 상기 발광층의 상부에 제1 금속층을 형성하는 단계; 상기 제1 금속층의 상부에 지그를 접착시키고, 상기 성장 기판을 제거하는 단계; 상기 발광층의 하부에 제2 금속층을 형성하는 단계; 상기 제1 금속층으로부터 지그를 제거하여 발광 구조물을 형성하는 단계; 및 상기 발광 구조물을 소정의 크기로 다이싱하여 각 층이 수평 배치된 발광 소자를 형성하는 단계를 포함한다.

    PEROVSKITE POLYMER COMPOSITE
    62.
    发明申请
    PEROVSKITE POLYMER COMPOSITE 审中-公开

    公开(公告)号：WO2019177537A1

    公开(公告)日：2019-09-19

    申请号：PCT/SG2019/050136

    申请日：2019-03-13

    Applicant: NATIONAL UNIVERSITY OF SINGAPORE

    Inventor： TAN, Zhi Kuang ,  WONG, Ying-Chieh ,  NG, Jun De Andrew ,  LI, Beiye

    IPC: C09K11/66 ,  H01L33/26 ,  H01L51/52 ,  H01L51/56 ,  C08K3/16 ,  C08L25/06 ,  C08L33/10 ,  B82Y40/00

    Abstract: Disclosed herein is a polymeric film, the film comprising a polymeric matrix material, a plurality of perovskite nanocrystals and/or aggregates of perovskite nanocrystals dispersed throughout the polymeric matrix material. There is also disclosed a perovskite polymer resin composition, a perovskite-polymer resin composition, a perovskite ink and a method of forming a luminescent film using any one of the compositions or ink. Preferably, the perovskite material is a lead halide perovskite containing a cation selected from Cs, an alkylammonium ion, or a formamidinium ion. The polymeric matrix is preferably formed from monomers comprising a vinyl or an acrylate group.

    BOTTOM EMITTING DISPLAY PANELS AND METHODS OF MANUFACTURE
    63.
    发明申请
    BOTTOM EMITTING DISPLAY PANELS AND METHODS OF MANUFACTURE 审中-公开

    公开(公告)号：WO2019079539A1

    公开(公告)日：2019-04-25

    申请号：PCT/US2018/056427

    申请日：2018-10-18

    Applicant: CORNING INCORPORATED

    Inventor： GARNER, Sean Matthew ,  SORENSEN, Michael Lesley

    IPC: H01L27/15 ,  H01L33/26 ,  H01L33/00 ,  H01L51/56

    Abstract: A display panel comprising a substrate, a plurality of pixel emitters, a light absorption layer and an interconnect layer. The substrate defines opposing, front and back major faces separated by a thickness. The pixel emitters are supported by the substrate. Light emitted from at least one of the pixel emitters travels from the back major face, through the thickness, and outwardly from the front major face. The light absorption layer is disposed over the back major face. The interconnect layer is disposed over the light absorption layer, and comprises circuitry electrically connected to at least one of the pixel emitters. At least a portion of ambient and/or stray light entering the display panel at the front major face is absorbed by the light absorption layer to decrease the reflected ambient or stray light returned to the front major face. The light absorption layer can comprise a sol gel-based material.

    METHODS AND APPARATUS FOR VERTICALLY STACKED MULTICOLOR LIGHT-EMITTING DIODE (LED) DISPLAY
    66.
    发明申请
    METHODS AND APPARATUS FOR VERTICALLY STACKED MULTICOLOR LIGHT-EMITTING DIODE (LED) DISPLAY 审中-公开

    公开(公告)号：WO2018156876A1

    公开(公告)日：2018-08-30

    申请号：PCT/US2018/019392

    申请日：2018-02-23

    Applicant: LEE, Kyusang ,  KONG, Wei ,  KIM, Jeehwan

    Inventor： LEE, Kyusang ,  KONG, Wei

    IPC: H01L29/02 ,  H01L33/26 ,  H01L33/36 ,  B32B38/10 ,  G09G3/32

    Abstract: A method of fabricating a multicolor light-emitting diode (LED) display includes forming a first LED layer on a first release layer comprising a first two-dimensional (2D) material disposed on a first substrate. The first LED layer is configured to emit light at a first wavelength. The method also includes transferring the first LED layer from the first release layer to a host substrate and forming a second LED layer on a second release layer comprising a second 2D material disposed on a second substrate. The second LED layer is configured to emit light at a second wavelength. The method also includes removing the second LED layer from the second release layer and disposing the second LED layer on the first LED layer.

    발광 소자
    68.
    发明申请
    발광 소자 审中-公开
    发光元件

    公开(公告)号：WO2017196022A1

    公开(公告)日：2017-11-16

    申请号：PCT/KR2017/004719

    申请日：2017-05-04

    Applicant: 엘지이노텍(주)

    Inventor： 정세연

    IPC: H01L33/02 ,  H01L33/26 ,  H01L33/44 ,  H01L33/36 ,  H01L33/22

    Abstract: 실시 예는 기판, 기판 상에 배치되는 제1 도전형 반도체층, 제1 도전형 반도체층 상에 배치되는 제2 도전형 반도체층, 및 제1 도전형 반도체층과 제2 도전형 반도체층 사이에 배치되는 활성층을 포함하는 발광 구조물, 및 제2 도전형 반도체층 상에 배치되는 투광성 전도층을 포함하며, 투광성 전도층은 제1 도전형 반도체층에 배치되고 적어도 하나의 제1 금속 원소, 및 산소를 포함하는 제1 전도성 산화물층 및 제1 전도성 산화물층 상에 배치되고 적어도 하나의 제1 금속 원소와 동일한 금속 원소, 제2 금속 원소, 및 산소의 화합물로 이루어진 제2 전도성 산화물층을 포함한다.

    Abstract translation:

    实施例中，第一导电类型半导体层，第二导电类型半导体层，以及设置设置在基底上的第一导电类型半导体层上的第一导电型半导体层， 以及设置在所述第二导电类型半导体层上的透光导电层，其中所述透光导电层设置在所述第一导电类型半导体层上并且包括至少一个 包括氧的第一导电氧化物层和设置在第一导电氧化物层上并包含至少一种金属元素的第一导电氧化物层， 2导电氧化物层。＆lt; p＆gt;

    LAYERED ACTIVE REGION LIGHT EMITTING DIODE
    69.
    发明申请
    LAYERED ACTIVE REGION LIGHT EMITTING DIODE 审中-公开
    分层活性区域发光二极管

    公开(公告)号：WO2017127183A1

    公开(公告)日：2017-07-27

    申请号：PCT/US2016/066697

    申请日：2016-12-14

    Applicant: X DEVELOPMENT LLC

    Inventor： GRUNDMANN, Michael ,  SCHUBERT, Martin F.

    IPC: H01L33/00 ,  H01L33/04 ,  H01L33/26 ,  H01L33/14

    CPC classification number: H01L33/145 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/06 ,  H01L33/32 ,  H01L33/42

    Abstract: An apparatus includes a p-type semiconductor material, an n-type semiconductor material, and an active region disposed between the p-type semiconductor material and the n-type semiconductor material. The active region emits light in response to a voltage applied across the active region, and the active region includes a quantum well region, a barrier region, and a capping region. The barrier region is disposed to confine charge carriers in the quantum well region. The capping region is disposed between the quantum well region and the barrier region, and the capping region is adjacent to the quantum well region to stabilize a material composition of the quantum well region. The quantum well region, the barrier region, and the capping region collectively form a first tri-layer structure.

    Abstract translation: 一种装置包括p型半导体材料，n型半导体材料以及设置在p型半导体材料和n型半导体材料之间的有源区。 有源区域响应于施加在有源区域两端的电压而发光，并且有源区域包括量子阱区域，势垒区域和覆盖区域。 势垒区域被设置为将电荷载流子限制在量子阱区域中。 覆盖区域设置在量子阱区域和势垒区域之间，并且覆盖区域与量子阱区域相邻以稳定量子阱区域的材料组成。 量子阱区域，势垒区域和封盖区域共同形成第一三层结构。

    OPTOELEKTRONISCHER HALBLEITERCHIP
    70.
    发明申请
    OPTOELEKTRONISCHER HALBLEITERCHIP 审中-公开
    光电子半导体芯片

    公开(公告)号：WO2017001296A1

    公开(公告)日：2017-01-05

    申请号：PCT/EP2016/064665

    申请日：2016-06-24

    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

    Inventor： RUDOLPH, Andreas

    IPC: H01L33/26 ,  H01L33/06

    CPC classification number: H01L33/26 ,  H01L33/06

    Abstract: Es wird ein optoelektronischer Halbleiterchip (10) angegeben, umfassend: -einen p-Typ-Halbleiterbereich (4), -einen n-Typ-Halbleiterbereich (6), -eine zwischen dem p-Typ-Halbleiterbereich (4) und dem n-Typ-Halbleiterbereich (6) angeordnete aktive Schicht (5), die als Mehrfach-Quantentopfstruktur (51, 52, 53) ausgebildet ist, wobei -die Mehrfach-Quantentopfstruktur (51, 52, 53) Quantentopfschichten (51A, 52A, 53A) und Barriereschichten (51B, 52B, 53B) aufweist, und -die Quantentopfschichten (51A, 52A, 53A) In x Al y Ga 1-x-y As mit 0 ≤ x ≤ 1, 0,01

    Abstract translation: 提供了一种光电子半导体芯片（10），包括：-a p型半导体区域（4），-a n型半导体区域（6），在p型半导体区域之间-a（4）和n 型半导体区域（6）布置的有源层（5），其被设计为多量子阱结构（51，52,53），-the多量子阱结构（51，52，53）的量子阱层（51A，52A，53A）和 阻挡层（51B，52B，53B），和-the量子阱层（51A，52A，53A）InxAlyGa1-X-Y与0≤X≤1，0.01

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