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    USING COUNTERS AND A TABLE TO PROTECT DATA IN A STORAGE DEVICE
    1.
    发明申请
    USING COUNTERS AND A TABLE TO PROTECT DATA IN A STORAGE DEVICE 审中-公开
    使用计数器和表保存存储设备中的数据

    公开(公告)号：WO2016077031A1

    公开(公告)日：2016-05-19

    申请号：PCT/US2015/056083

    申请日：2015-10-16

    Applicant: INTEL CORPORATION

    Inventor： STEVENS, William A. Jr. ,  SARANGDHAR, Nitin V.

    IPC: G06F21/62 ,  G06F21/60

    CPC classification number: G06F3/062 ,  G06F3/0622 ,  G06F3/0637 ,  G06F3/0673 ,  G06F3/0689 ,  G06F21/6227

    Abstract: Provided are a system, memory controller, and method for using counters and a table to protect data in a storage device. Upon initiating operations to modify a file in the storage device, a storage write counter is incremented in response to initiating the operations to modify the file. In response to incrementing the storage write counter, write table operations are initiated including setting a table write counter to a storage write counter and setting a table commit counter to the storage commit counter plus a value. The operation to modify the file in response to completing the write table operations. The system commit counter is incremented by the value in response to completing the operation to modify the file.

    Abstract translation: 提供了一种用于使用计数器和表来保护存储设备中的数据的系统，存储器控制器和方法。 在启动操作以修改存储设备中的文件时，存储写计数器响应于启动修改文件的操作而增加。 响应于增加存储写计数器，启动写表操作，包括将表写计数器设置为存储写计数器，并将存储提交计数器的表提交计数器加上值。 响应完成写表操作来修改文件的操作。 响应完成修改文件的操作，系统提交计数器将增加值。

    ELECTROLYTIC DEPOSITON AND VIA FILLING IN CORELESS SUBSTRATE PROCESSING
    3.
    发明申请
    ELECTROLYTIC DEPOSITON AND VIA FILLING IN CORELESS SUBSTRATE PROCESSING 审中-公开
    电沉积物和通过在无机基底处理中填充

    公开(公告)号：WO2012040724A1

    公开(公告)日：2012-03-29

    申请号：PCT/US2011/053307

    申请日：2011-09-26

    Applicant: INTEL CORPORATION ,  WU, Tao ,  WATTS, Nicholas R.

    Inventor： WU, Tao ,  WATTS, Nicholas R.

    IPC: H01L23/12 ,  H01L23/48

    CPC classification number: H01L21/486 ,  C23C18/1653 ,  H01L23/142 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00

    Abstract: Electronic assemblies including coreless substrates and their manufacture using electrolytic plating, are described. One method includes providing a core comprising a metal, and forming a dielectric material on the core. The method also includes forming vias in the dielectric material, the vias positioned to expose metal regions. The method also performing an electrolytic plating of metal into the vias and on the metal regions, wherein the core is electrically coupled to a power supply during the electrolytic plating of metal into the vias and delivers current to the metal regions. The method also includes removing the metal core after the electrolytic plating of metal into the vias. Other embodiments are described and claimed.

    Abstract translation: 描述了包括无芯基板的电子组件及其使用电解电镀的制造。 一种方法包括提供包括金属的芯，并在芯上形成电介质材料。 该方法还包括在电介质材料中形成通孔，定位为使金属区域露出的通孔。 该方法还执行金属的电解电镀到通孔和金属区域中，其中在将金属电解电镀到通孔中并将电流传送到金属区域时，芯与电源电耦合。 该方法还包括在金属电镀到通孔中之后去除金属芯。 描述和要求保护其他实施例。

    PROCESSING RECEIVE PROTOCOL DATA UNITS
    4.
    发明申请
    PROCESSING RECEIVE PROTOCOL DATA UNITS 审中-公开
    处理接收协议数据单元

    公开(公告)号：WO2006011963A1

    公开(公告)日：2006-02-02

    申请号：PCT/US2005/020551

    申请日：2005-06-10

    Applicant: INTEL CORPORATION (a Delaware Corporation) ,  COLMAN, Nicholas ,  KRISHNAN, Ramesh ,  THAKUR, Anshuman ,  CONE, Robert ,  MANSEAU, Daniel

    Inventor： COLMAN, Nicholas ,  KRISHNAN, Ramesh ,  THAKUR, Anshuman ,  CONE, Robert ,  MANSEAU, Daniel

    IPC: H04L12/56

    CPC classification number: H04L29/06 ,  H04L69/16 ,  H04L69/22

    Abstract: Provided are techniques for processing a data segment by stripping a header from a transport layer segment, performing protocol data unit detection to determine data for a protocol segment that is part of the transport layer segment data, and performing marker validation and stripping. Also provided are techniques for processing a data segment in which a header portion of a protocol data unit is received. A number of bytes of data to be stored in an application space is determined using the received header portion. Also, a next header portion of a next protocol data unit is determined using the received header portion. Then, a peek command is issued to obtain the next header portion. Additionally provided are techniques for performing cyclic redundancy checks using a stored partial cyclic redundancy check digest and residual data.

    Abstract translation: 提供了通过从传输层段剥离报头来处理数据段的技术，执行协议数据单元检测以确定作为传输层段数据的一部分的协议段的数据，以及执行标记验证和剥离。 还提供了用于处理其中接收到协议数据单元的报头部分的数据段的技术。 使用接收的报头部分来确定要存储在应用空间中的数据字节数。 此外，使用接收的报头部分来确定下一协议数据单元的下一报头部分。 然后，发出窥视命令以获得下一个标题部分。 另外提供了使用存储的部分循环冗余校验摘要和残差数据执行循环冗余校验的技术。

    METHOD AND APPARATUS FOR PROCESSING SEQUENTIAL WRITES TO A BLOCK GROUP OF PHYSICAL BLOCKS IN A MEMORY DEVICE
    5.
    发明申请
    METHOD AND APPARATUS FOR PROCESSING SEQUENTIAL WRITES TO A BLOCK GROUP OF PHYSICAL BLOCKS IN A MEMORY DEVICE 审中-公开
    用于处理顺序写入存储器装置中的块组物理块的方法和设备

    公开(公告)号：WO2017172248A1

    公开(公告)日：2017-10-05

    申请号：PCT/US2017/020532

    申请日：2017-03-02

    Applicant: INTEL CORPORATION

    Inventor： HADY, Frank T.

    IPC: G06F12/02

    Abstract: Provided are an apparatus and method for processing sequential writes to a block group of physical blocks in a memory device. Sequential write data for a plurality of consecutive logical addresses is received and a determination is made of consecutive physical blocks comprising a block group. Each of the physical blocks has data for a plurality of the consecutive logical addresses. The sequential write data is written to consecutive physical data locations having data for the determined consecutive physical blocks of the block group. The block group metadata for the block group is updated.

    Abstract translation: 提供了用于处理对存储器件中的物理块的块组的顺序写入的装置和方法。 接收多个连续逻辑地址的顺序写入数据并且确定包括块组的连续物理块。 每个物理块具有用于多个连续逻辑地址的数据。 顺序写入数据被写入到具有用于块组的确定的连续物理块的数据的连续物理数据位置。 块组的块组元数据更新。

    METHOD AND SYSTEM TO IMPROVE THE PERFORMANCE AND/OR RELIABILITY OF A SOLID-STATE DRIVE
    6.
    发明申请
    METHOD AND SYSTEM TO IMPROVE THE PERFORMANCE AND/OR RELIABILITY OF A SOLID-STATE DRIVE 审中-公开

    公开(公告)号：WO2012006106A3

    公开(公告)日：2012-01-12

    申请号：PCT/US2011/042222

    申请日：2011-06-28

    Applicant: INTEL CORPORATION ,  KHAN, Jawad B.

    Inventor： KHAN, Jawad B.

    IPC: G06F12/00 ,  G06F11/10

    Abstract: A method and system to improve the performance and/or reliability of a solid-state drive (SSD). In one embodiment of the invention, the SSD has logic compress a block of data to be stored in the SSD. If it is not possible to compress the block of data below the threshold, the SSD stores the block of data without any compression. If it is possible to compress the block of data below the threshold, the SSD compresses the block of data and stores the compressed data in the SSD. In one embodiment of the invention, the SSD has logic to dynamically adjust or select the strength of the error correcting code of the data that is stored in the SSD. In another embodiment of the invention, the SSD has logic to provide intra-page XOR protection of the data in the page.

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