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    MAC-BASED ROUTING
    1.
    发明申请
    MAC-BASED ROUTING 审中-公开

    公开(公告)号：WO2023076113A1

    公开(公告)日：2023-05-04

    申请号：PCT/US2022/047393

    申请日：2022-10-21

    Applicant: ARISTA NETWORKS, INC.

    Inventor： SNOWDON, David ,  BROWN, Andrew John Edward ,  HOLBROOK, Hugh Weber

    IPC: H04L45/00 ,  H04L45/74 ,  H04L49/25 ,  H04L49/00 ,  H04L49/60

    Abstract: A network device is configured to route an ingress packet based on its L2 header. In some configurations the ingress packet is routed based only on the destination MAC (DMAC) address in the L2 header, which allows the network device to begin routing as soon as the DMAC is received. The DMAC can be used in a table look up operation to identify routing actions for a nexthop. An egress packet is produced from the ingress packet using the routing actions. The egress packet is then sent on an egress port specified in the routing actions.

    TIME STAMP GENERATION
    2.
    发明申请
    TIME STAMP GENERATION 审中-公开

    公开(公告)号：WO2020251810A1

    公开(公告)日：2020-12-17

    申请号：PCT/US2020/035771

    申请日：2020-06-02

    Applicant: ARISTA NETWORKS, INC.

    Inventor： LOWES, Russell Andrew ,  BRIDGER, Andrew ,  DEJANOVIC, Thomas ,  SNOWDON, David Charles Ambler

    IPC: H04J1/16 ,  H04J3/06 ,  H04L12/28

    Abstract: Embodiments of the present disclosure include techniques for generating accurate time stamps. In one embodiment, a first timing reference signal corresponding to a first clock domain is combined with a first clock signal corresponding to a second clock domain to produce a second timing reference signal that includes quantization noise. The second timing reference signal is filtered to remove the quantization noise and generate a filtered timing reference signal. The filtered timing reference signal may be sampled in the second clock domain to obtain a time stamp. In one embodiment, a phase locked loop (PEL) is used as the filter. The PEL may generate first and second ramps that correspond to time. One of the ramps may be sampled to obtain a time stamp, for example.

    HIGH VOLTAGE SWITCH
    3.
    发明申请
    HIGH VOLTAGE SWITCH 审中-公开
    高压开关

    公开(公告)号：WO2016122955A1

    公开(公告)日：2016-08-04

    申请号：PCT/US2016/014249

    申请日：2016-01-21

    Applicant: QUALCOMM INCORPORATED

    Inventor： JOSHI, Alok Prakash ,  RAJENDRAN, Gireesh

    IPC: H03K17/10

    CPC classification number: H03K17/693 ,  H03K17/102 ,  H03K2217/0018

    Abstract: Disclosed is circuitry for operating a switch which sees high voltage swings across its source, gate, drain, and bulk terminals. The circuitry generates one or more bias voltages in proportion to an input voltage swing.. The one or more bias voltages may be used to bias the gate and bulk terminals to provide reliable and improved turn OFF performance in the switch.

    Abstract translation: 公开了用于操作开关的电路，其看到其源极，栅极，漏极和体积端子之间的高电压摆幅。 电路与输入电压摆幅成比例地产生一个或多个偏置电压。一个或多个偏置电压可用于偏置栅极和体积端子，以在开关中提供可靠和改善的断开性能。

    DISTRIBUTED POWER RECEIVING ELEMENTS FOR WIRELESS POWER TRANSFER
    4.
    发明申请
    DISTRIBUTED POWER RECEIVING ELEMENTS FOR WIRELESS POWER TRANSFER 审中-公开
    分布式功率接收元件进行无线电力传输

    公开(公告)号：WO2016064551A1

    公开(公告)日：2016-04-28

    申请号：PCT/US2015/053501

    申请日：2015-10-01

    Applicant: QUALCOMM INCORPORATED

    Inventor： JEONG, Seong Heon

    IPC: H02J5/00 ,  H02J7/02 ,  H04B5/00

    CPC classification number: H02J5/005 ,  H02J7/0042 ,  H02J7/025 ,  H02J50/12 ,  H04B5/00 ,  H04B5/0037 ,  H04B5/0075

    Abstract: An apparatus for wireless charging may include a casing for housing an electronic device and a plurality of power receiving elements that can couple to an externally generated magnetic field to wirelessly power or charge a load in the electronic device. At least one of the power receiving elements may comprise an electrically conductive segment of the casing.

    Abstract translation: 一种用于无线充电的装置可以包括用于容纳电子装置的壳体和可以耦合到外部产生的磁场的多个电力接收元件以无线地为电子装置中的负载供电或充电。 功率接收元件中的至少一个可以包括壳体的导电段。

    CURRENT SENSE CIRCUIT USING A SINGLE OPAMP HAVING DC OFFSET AUTO-ZEROING
    6.
    发明申请
    CURRENT SENSE CIRCUIT USING A SINGLE OPAMP HAVING DC OFFSET AUTO-ZEROING 审中-公开
    使用具有直流偏移自动归零的单个电压的电流检测电路

    公开(公告)号：WO2016007316A1

    公开(公告)日：2016-01-14

    申请号：PCT/US2015/038126

    申请日：2015-06-26

    Applicant: QUALCOMM INCORPORATED

    Inventor： PELUSO, Vincenzo F.

    IPC: H03F1/30

    CPC classification number: H03F3/005 ,  H03F1/303 ,  H03F3/45179 ,  H03F2200/231 ,  H03F2203/45156

    Abstract: A current sense circuit having a single opamp DC offset auto-zero capability that allows for continuous current sensing operation while at the same time providing for DC offset sensing and compensation. The single opamp design can operate in a first phase to sense and store a DC offset, while providing an output to drive an output stage of the current sense circuit. The single opamp design can operate in a second phase, using the sensed DC offset to generate an accurate output that can drive the output stage and which can be used in the first phase.

    Abstract translation: 具有单个运算放大器DC偏移自动调零功能的电流检测电路，允许连续电流检测操作，同时提供DC偏移检测和补偿。 单个运算放大器设计可以在第一阶段中操作以感测和存储DC偏移，同时提供输出来驱动电流感测电路的输出级。 单个运算放大器设计可以在第二阶段中工作，使用感测的直流偏移来产生可驱动输出级并可在第一阶段使用的精确输出。

    ADAPTIVE STABILITY CONTROL FOR A DRIVER CIRCUIT
    9.
    发明申请
    ADAPTIVE STABILITY CONTROL FOR A DRIVER CIRCUIT 审中-公开
    驱动电路的自适应稳定控制

    公开(公告)号：WO2015187351A1

    公开(公告)日：2015-12-10

    申请号：PCT/US2015/031381

    申请日：2015-05-18

    Applicant: QUALCOMM INCORPORATED

    Inventor： PENG, Xinli ,  DHAR, Sandeep Chaman ,  STOCKSTAD, Troy

    IPC: H05B33/08

    CPC classification number: H05B33/0845 ,  H03K3/01 ,  H05B33/0809 ,  H05B33/0884

    Abstract: A circuit for driving a load may include a control loop having a response characteristic. A headroom signal indicative of the headroom voltage of the circuit may set one or more parameters of the response characteristic. A load sign indicative of electrical loading on the circuit may further set the response characteristic.

    Abstract translation: 用于驱动负载的电路可以包括具有响应特性的控制回路。 指示电路的净空电压的净空信号可以设置响应特性的一个或多个参数。 指示电路上的电负载的负载符号可以进一步设置响应特性。

    MULTI-OUTPUT BOOST REGULATOR WITH SINGLE CONTROL LOOP
    10.
    发明申请
    MULTI-OUTPUT BOOST REGULATOR WITH SINGLE CONTROL LOOP 审中-公开
    具有单控制环路的多输出升压调节器

    公开(公告)号：WO2015038766A1

    公开(公告)日：2015-03-19

    申请号：PCT/US2014/055181

    申请日：2014-09-11

    Applicant: QUALCOMM INCORPORATED

    Inventor： HAWAWINI, Shadi ,  GARCEA, Giovanni

    IPC: H02M3/158

    CPC classification number: H02M3/1582 ,  H02M1/08 ,  H02M3/158 ,  H02M3/1588 ,  H02M2001/009 ,  Y02B70/1466

    Abstract: A switching regulator circuit provides forward mode operation where a voltage provided at an input port can be boosted or bucked to produce a regulated voltage at an output port of the circuit. In accordance with the present disclosure, the switching regulator circuit includes two or more input ports. The switching regulator circuit provides a reverse boost operation in which a voltage provided at the output port of the circuit can be boosted to produce a regulated voltage at both of the input ports of the circuit.

    Abstract translation: 开关调节器电路提供正向模式操作，其中在输入端口处提供的电压可以升压或降压以在电路的输出端口处产生调节电压。 根据本公开，开关调节器电路包括两个或更多个输入端口。 开关调节器电路提供反向升压操作，其中提供在电路的输出端口处的电压可以升高以在电路的两个输入端口处产生调节电压。

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