公开(公告)号：WO2011073940A1

公开(公告)日：2011-06-23

申请号：PCT/IB2010/055875

申请日：2010-12-16

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  HAAS, Robert ,  HU, Xiao-Yu ,  ILIADIS, Ilias ,  MITTELHOLZER, Thomas

Inventor： CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  HAAS, Robert ,  HU, Xiao-Yu ,  ILIADIS, Ilias ,  MITTELHOLZER, Thomas

IPC: G06F11/10

CPC classification number: G06F11/1008 ,  G06F11/1012 ,  G06F11/1068 ,  G06F11/108

Abstract: Methods and apparatus are provided for controlling data management operations including storage of data in solid state storage (6) of a solid state storage system (5). Input data is stored in successive groups of data write locations in the solid state storage (6). Each group comprises a set of write locations in each of a plurality of logical subdivisions of the solid state storage (6). The input data to be stored in each group is encoded in accordance with first and second linear error correction codes. The encoding is performed by constructing from the input data to be stored in each group a logical array of rows and columns of data symbols. The rows and columns are respectively encoded in accordance with the first and second linear error correction codes to produce an encoded array in which all rows correspond to respective first codewords and columns correspond to respective second codewords. The encoding and storage operation is performed such that, in each said group, the encoded input data comprises a plurality of first codewords in each of a plurality of the logical subdivisions and each logical subdivision contains a portion of each of the second codewords for that group.

Abstract translation: 提供了用于控制数据管理操作的方法和装置，包括在固态存储系统（5）的固态存储（6）中存储数据。 输入数据存储在固态存储器（6）中的连续的数据写入位置组中。 每个组包括在固态存储器（6）的多个逻辑子部分中的每一个中的一组写入位置。 要存储在每个组中的输入数据根据第一和第二线性纠错码进行编码。 通过从输入数据中构成数据符号的行和列的逻辑阵列，来构成编码。 行和列分别根据第一和第二线性纠错码编码以产生编码阵列，其中所有行对应于相应的第一码字和列对应于相应的第二码字。 执行编码和存储操作，使得在每个所述组中，编码的输入数据包括多个逻辑子部分中的每一个中的多个第一码字，并且每个逻辑细分包含该组的每个第二码字的一部分 。

公开(公告)号：WO2005064611A1

公开(公告)日：2005-07-14

申请号：PCT/IB2004/003761

申请日：2004-11-17

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  CIDECIYAN, Roy D. ,  DHOLAKIA, Ajay ,  ELEFTHERIOU, Evangelos S. ,  GALBRAITH, Richard L. ,  HANSON, Weldon M. ,  MITTELHOLZER, Thomas ,  OENNING, Travis R.

Inventor： CIDECIYAN, Roy D. ,  DHOLAKIA, Ajay ,  ELEFTHERIOU, Evangelos S. ,  GALBRAITH, Richard L. ,  HANSON, Weldon M. ,  MITTELHOLZER, Thomas ,  OENNING, Travis R.

IPC: G11B20/14

CPC classification number: G11B20/1833

Abstract: A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decoder. The error correction encoder applies an error correction code to the incoming user bit stream, and the modulation encoder applies so called modulation or constrained coding to the error correction coded bit stream. The precoder applies so called precoding to the modulation encoded bit stream. However, this precoding is applied to selected portions of the bit stream only. There can also be a permutation step where the bit sequence is permuted after the modulation encoder before precoding is applied by the precoder. The decoder subsystem operates in the inverse manner.

Abstract translation: 数据存储系统包括编码器子系统，包括纠错码编码器，调制编码器和预编码器，以及类似地包括检测器，逆预编码器，信道解码器和纠错码解码器的解码器子系统。 纠错编码器对输入用户比特流应用纠错码，并且调制编码器将所谓的调制或约束编码应用于纠错编码比特流。 预编码器将所谓的预编码应用于调制编码比特流。 然而，该预编码仅应用于位流的选定部分。 还可以存在一个置换步骤，其中在由预编码器施加预编码之前，该位序列在调制编码器之后被置换。 解码器子系统以相反的方式运行。

公开(公告)号：WO2011092641A1

公开(公告)日：2011-08-04

申请号：PCT/IB2011/050355

申请日：2011-01-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  CIDECIYAN, Roy D. ,  ILIADIS, Ilias ,  PLETKA, Roman A.

Inventor： CIDECIYAN, Roy D. ,  ILIADIS, Ilias ,  PLETKA, Roman A.

IPC: G06F11/10

CPC classification number: G06F11/1072

Abstract: A method for decoding a codeword received from a flash memory is proposed. The flash memory comprises several multi-level flash memory cells, wherein each such multi-level flash memory cell stores one symbol of the codeword. An ECC decoder is arranged for decoding the codeword into a decoded codeword and is designed to correct a maximum number of errors. The method comprises an error check step for determining the number of errors in the codeword. If the number of errors is more than the maximum number of errors the ECC decoder can correct then at least one of a first symbol modification step and a second symbol modification step is performed. In the first symbol modification step a first modified codeword is generated by increasing the value of the symbol to the next higher value level and in the second symbol modification step a second modified codeword is generated by decreasing the value of the symbol (Si) to the next lower value level. In an analysis step the corrective effect of the symbol modification steps is calculated and in a return step the decoded codeword is determined based on the corrective effect, or an erasure of the codeword.

Abstract translation: 提出了一种用于对从闪速存储器接收的码字进行解码的方法。 闪存包括多个多级闪存单元，其中每个这样的多级闪存单元存储码字的一个符号。 ECC解码器被布置用于将码字解码为解码码字，并被设计为校正最大数量的错误。 该方法包括用于确定码字中的错误数量的错误检查步骤。 如果错误的数量大于ECC解码器可以校正的最大错误数，则执行第一符号修改步骤和第二符号修改步骤中的至少一个。 在第一符号修改步骤中，通过将符号的值增加到下一较高值电平来生成第一修改码字，并且在第二符号修改步骤中，通过将符号（Si）的值减小到第二修改码字来生成第二修改码字 下一个较低的值级别。 在分析步骤中，计算符号修改步骤的校正效果，并且在返回步骤中，基于校正效果或代码字的擦除来确定解码码字。

公开(公告)号：WO2009136374A3

公开(公告)日：2009-12-30

申请号：PCT/IB2009051882

申请日：2009-05-07

Applicant: IBM ,  CHERUBINI GIOVANNI ,  CIDECIYAN ROY D ,  ELEFTHERIOU EVANGELOS S ,  JELITTO JENS ,  LANTZ MARK A

Inventor： CHERUBINI GIOVANNI ,  CIDECIYAN ROY D ,  ELEFTHERIOU EVANGELOS S ,  JELITTO JENS ,  LANTZ MARK A

IPC: G11B5/584 ,  G11B21/10

CPC classification number: G11B5/584

Abstract: A servo write head is provided and is configured to simultaneously write at least two servo patterns in respective servo bands on linear magnetic tape. Centerlines of the servo patterns are substantially uniformly spaced in the lateral direction. In addition, the servo patterns of all adjacent respective servo bands are displaced relative to each other in a longitudinal direction by an amount that is related to a length of a servo frame and a type of the servo patterns.

Abstract translation: 伺服写入头被提供并被配置为在线性磁带上的相应伺服带中同时写入至少两个伺服模式。 伺服图案的中心线在横向上基本均匀地间隔开。 另外，所有相邻的各个伺服带的伺服图案在纵向上相对于彼此移位与伺服帧的长度和伺服图案的类型有关的量。

公开(公告)号：WO2009153702A1

公开(公告)日：2009-12-23

申请号：PCT/IB2009/052440

申请日：2009-06-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  CHERUBINI, Giovanni ,  CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  JELITTO, Jens

Inventor： CHERUBINI, Giovanni ,  CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  JELITTO, Jens

IPC: G11B5/584

CPC classification number: G11B5/584

Abstract: Methods and apparatus are provided for detecting L-bit sync words occurring at N-bit intervals in PPM-encoded servo pattern read signals read from magnetic tape (3) in tape drives (1). A soft output detector (11) processes the PPM-encoded servo pattern read signal to produce a series of soft output samples corresponding to respective bits encoded in the servo pattern. A sync word detector (12) then produces block correlation values for respective positions of a sliding L-sample block in the soft output sample series. The block correlation values are produced by calculating, at each block position, bit correlation values indicating correlation between respective samples and corresponding bits of the sync word, and summing each bit correlation value minus a predetermined function of the corresponding sample value. The sync word detector (12) then detects a sync word at the block position with the maximum block correlation value in an (N+L-1)-sample sequence of the soft output sample series.

Abstract translation: 提供了用于检测在磁带驱动器（1）中从磁带（3）读取的PPM编码的伺服模式读取信号中以N位间隔发生的L位同步字的方法和装置。 软输出检测器（11）处理PPM编码的伺服模式读取信号以产生对应于在伺服模式中编码的各个位的一系列软输出采样。 同步字检测器（12）然后产生软输出采样序列中的滑动L样本块的相应位置的块相关值。 通过在每个块位置计算指示各个采样和同步字的对应位之间的相关性并将每个位相关值减去相应采样值的预定函数的相加值来产生块相关值。 然后，同步字检测器（12）在软输出采样序列的（N + L-1） - 采样序列中检测具有最大块相关值的块位置处的同步字。

公开(公告)号：WO2012163250A1

公开(公告)日：2012-12-06

申请号：PCT/CN2012/076089

申请日：2012-05-25

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM (CHINA) CO., LIMITED ,  CIDECIYAN, Roy D. ,  MITTELHOLZER, Thomas ,  SEGER, Paul J. ,  TANAKA, Keisuke

Inventor： CIDECIYAN, Roy D. ,  MITTELHOLZER, Thomas ,  SEGER, Paul J. ,  TANAKA, Keisuke

IPC: G11B5/008

CPC classification number: G11B5/0083 ,  G11B5/09 ,  G11B20/10009 ,  G11B20/10222 ,  G11B20/10259 ,  G11B20/1833 ,  G11B2220/956 ,  H03M13/09 ,  H03M13/27 ,  H03M13/2909 ,  H03M13/2945 ,  H03M13/6561 ,  H04L1/0042

Abstract: A method for randomizing data to mitigate false VFO detection is described. In one embodiment, such a method includes simultaneously receiving multiple input data streams. Each input data stream is associated with a different track on a magnetic tape medium. The input data streams are simultaneously scrambled to produce multiple randomized data streams. The input data streams are scrambled such that different bit patterns are produced in the randomized data streams even where corresponding bit patterns in the input data streams are identical. The randomized data streams are simultaneously written to their associated data tracks on the magnetic tape medium. A corresponding apparatus is also described.

Abstract translation: 描述用于随机化数据以减轻虚假VFO检测的方法。 在一个实施例中，这种方法包括同时接收多个输入数据流。 每个输入数据流与磁带介质上的不同轨道相关联。 输入数据流被同时加扰以产生多个随机数据流。 输入数据流被加扰，使得在随机数据流中产生不同的位模式，即使输入数据流中相应的位模式是相同的。 随机数据流被同时写入到磁带介质上的相关联的数据轨道上。 还描述了相应的装置。

公开(公告)号：WO2011073939A1

公开(公告)日：2011-06-23

申请号：PCT/IB2010/055874

申请日：2010-12-16

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  HAAS, Robert ,  HU, Xiao-Yu ,  ILIADIS, Ilias

Inventor： CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  HAAS, Robert ,  HU, Xiao-Yu ,  ILIADIS, Ilias

IPC: G06F11/10

CPC classification number: G06F11/108 ,  G06F11/1008 ,  G06F11/1068 ,  H03M13/05

Abstract: Methods and apparatus are provided for controlling a solid state storage device (5) in which the solid state storage (6) comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage (6). The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage (6), is maintained in memory (13). An indication of validity of data stored in each data write location is also maintained. Prior to erasing a block, valid input data is recovered from the or each said group containing write locations in that block. The recovered data is then re-stored as new input data.

Abstract translation: 提供了用于控制固态存储设备（5）的方法和装置，其中固态存储器（6）包括每个包括多个数据写入位置的可擦除块。 输入数据存储在连续的数据写入位置组中，每组包括在固态存储器（6）的多个逻辑子部分中的每一个中的一组可擦除块中的写入位置。 输入数据被纠错编码，使得每个组包含用于该组中的输入数据的纠错码。 指示固态存储器（6）中的输入数据的位置的元数据被保存在存储器（13）中。 还保持了存储在每个数据写入位置中的数据的有效性的指示。 在擦除块之前，从该块中包含写入位置的该组或每个所述组恢复有效的输入数据。 然后将恢复的数据重新存储为新的输入数据。

公开(公告)号：WO2011064754A1

公开(公告)日：2011-06-03

申请号：PCT/IB2010/055458

申请日：2010-11-26

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  ANTONAKOPOULOS, Theodore A. ,  CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  HAAS, Robert ,  HU, Xiao-Yu ,  ILIADIS, Ilias

Inventor： ANTONAKOPOULOS, Theodore A. ,  CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  HAAS, Robert ,  HU, Xiao-Yu ,  ILIADIS, Ilias

IPC: G06F11/10 ,  G11C29/00

CPC classification number: G06F11/1028 ,  G11C29/765

Abstract: Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate.

Abstract translation: 提供了通过使用容错架构以及用于随机/突发错误校正的一个纠错码（ECC）机制来解决固态驱动器（SSD）中的故障存储集成电路（IC）的问题的系统和方法，以及 L折叠交织机制。 当一个或多个集成电路出现故障并且允许从故障集成电路恢复先前存储的数据并且允许在其他操作集成电路中校正随机/突发错误时，本文描述的系统和方法保持SSD的可操作性。 这些系统和方法用作为备用集成电路处理的全功能/可操作集成电路来代替故障集成电路。 此外，这些系统和方法在最大可实现的读/写数据速率方面提高了I / O性能。

公开(公告)号：WO2011121490A1

公开(公告)日：2011-10-06

申请号：PCT/IB2011/051219

申请日：2011-03-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  MITTELHOLZER, Thomas

Inventor： CIDECIYAN, Roy D. ,  ELEFTHERIOU, Evangelos S. ,  MITTELHOLZER, Thomas

IPC: H03M13/15 ,  H03M13/29 ,  G06F11/10

CPC classification number: H03M13/2906 ,  G06F11/1072 ,  H03M13/152 ,  H03M13/2942

Abstract: Methods and apparatus are provided for encoding input data for recording in s-level storage(2)of a solid state storage device(1), where s≥2. Input data words are encoded in groups of M input data words in accordance with first and second BCH codes to produce, for each group, a set of M first codewords of the first BCH code. The set of M first codewords is produced such that at least one predetermined linear combination of the M first codewords produces a second codeword of the second BCH code, this second BCH code being a sub- code of the first BCH code. The sets of M first codewords are then recorded in the s-level storage(2).If each of the first and second codewords comprises N q-ary symbols where q =p k , k is a positive integer and p is a prime number, the q-ary code alphabet can be matched to the s-ary storage (2) by ensuring that q and s are u th and v th powers respectively of a common base r, where u and v are positive integers and k≥u, whereby p (k/u)v = s.

Abstract translation: 提供了用于编码用于在固态存储装置（1）的s级存储器（2）中记录的输入数据的方法和装置，其中s = 2。 输入数据字根据第一和第二BCH码以M个输入数据字的组进行编码，以针对每个组产生第一BCH码的一组M个第一码字。 产生M个第一码字集合，使得M个第一码字的至少一个预定线性组合产生第二BCH码的第二码字，该第二BCH码是第一BCH码的子码。 这些M个第一码字的集合然后被记录在s级存储器（2）中。如果第一和第二码字中的每一个包括N个q个符号，其中q = pk，k是正整数，p是素数， 通过确保q和s分别是公共基础r的uth和vth功率，其中u和v是正整数，并且k = u，可以将q元代码字母表与s存储器（2）匹配，由此p （k / u）v = s。

公开(公告)号：WO2011067706A1

公开(公告)日：2011-06-09

申请号：PCT/IB2010/055471

申请日：2010-11-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  ANTONAKOPOULOS, Theodore A. ,  CIDECIYAN, Roy D. ,  HU, Xiao-Yu ,  ILIADIS, Ilias ,  PLETKA, Roman A.

Inventor： ANTONAKOPOULOS, Theodore A. ,  CIDECIYAN, Roy D. ,  HU, Xiao-Yu ,  ILIADIS, Ilias ,  PLETKA, Roman A.

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0679 ,  G06F2212/7211

Abstract: A method for intra-block wear leveling within solid-state memory subjected to wear, having a plurality of memory cells includes the step of writing to at least certain ones of the plurality of memory cells, in a non-uniform manner, such as to balance the wear of the at least certain ones of the plurality of memory cells within the solid-state memory, at intra-block level. For example, if a behavior of at least some of the plurality of memory cells is not characterized, then the method may comprise characterizing a behavior of at least some of the plurality of memory cells and writing to at least certain ones of the plurality of memory cells, based on the characterized behavior, and in a non- uniform manner.

Abstract translation: 在具有多个存储单元的固态存储器内部进行具有多个存储单元的固态存储器内的块内损耗均衡的方法包括以非均匀方式写入多个存储单元中的至少某些存储单元的步骤， 在块内级别平衡固态存储器内的多个存储单元中的至少某些存储器单元的磨损。 例如，如果多个存储器单元中的至少一些存储器单元的行为没有被表征，则该方法可以包括表征多个存储器单元中的至少一些的行为，并写入多个存储器中的至少某些存储器 基于表征的行为，并且以非均匀的方式。