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    LOW LATENCY DATA COMMUNICATIONS UTILIZING ADVANCED CODING
    1.
    发明申请
    LOW LATENCY DATA COMMUNICATIONS UTILIZING ADVANCED CODING 审中-公开
    低延迟数据通信利用先进的编码

    公开(公告)号：WO2018009572A1

    公开(公告)日：2018-01-11

    申请号：PCT/US2017/040757

    申请日：2017-07-05

    Applicant: IDAC HOLDINGS, INC.

    Inventor： PAN, Kyle, Jung-Lin ,  WANUGA, Kevin, T. ,  XI, Fengjun ,  LAWTON, William, E. ,  DEMIR, Alpaslan

    IPC: H04L1/00 ,  H03M13/35

    CPC classification number: H04L1/007 ,  H03M13/09 ,  H03M13/13 ,  H03M13/2906 ,  H03M13/635 ,  H04L1/0041 ,  H04L1/0057 ,  H04L1/0061 ,  H04L1/0071

    Abstract: Systems, procedures, and instrumentalities are disclosed for low latency data communications utilizing advanced coding via polar codes. An encoder may receive data traffic that includes different types of traffics such as URLLC data and control information. The encoder may sort the different types of traffics into multiple tiers of varying priorities. The encoder may map data included in the tiers to multiple bit channels of varying channel coding reliabilities. The encoder may receive a bit channel mapping rule indicating that a higher tier corresponds higher channel coding reliability. The encoder may dynamically receive the bit channel mapping rule such that the mapping of priority tiers to bit channels differs from one code block to another code block.

    Abstract translation: 系统，过程和手段公开用于利用极性代码的高级编码的低延迟数据通信。 编码器可以接收包括诸如URLLC数据和控制信息的不同类型的业务的数据业务。 编码器可以将不同类型的业务分成多个不同优先级的层。 编码器可以将包括在层中的数据映射到变化的信道编码可靠性的多个比特信道。 编码器可以接收指示较高层对应较高信道编码可靠性的比特信道映射规则。 编码器可以动态地接收比特信道映射规则，使得优先级到比特信道的映射不同于一个码块到另一个码块。

    METHOD AND APPARATUS FOR FORWARD ERROR CORRECTION ENCODING
    3.
    发明申请
    METHOD AND APPARATUS FOR FORWARD ERROR CORRECTION ENCODING 审中-公开
    用于前向纠错编码的方法和设备

    公开(公告)号：WO2017178264A1

    公开(公告)日：2017-10-19

    申请号：PCT/EP2017/057843

    申请日：2017-04-03

    Applicant: ALCATEL LUCENT

    Inventor： SCHMALEN, Laurent ,  ZHANG, Lei

    IPC: H03M13/29 ,  H03M13/27 ,  H03M13/15 ,  H03M13/19

    CPC classification number: H03M13/2906 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/19 ,  H03M13/2757 ,  H03M13/611 ,  H03M13/6368

    Abstract: Feed-forward or partial feed-forward staircase codes (FF-SC or PFF-SC) using the principle of staircase coding however without, at least partly, re-encoding parity bit blocks. Information symbols are mapped to information symbol positions in a sequence of two-dimensional symbol blocks, wherein a symbol block ( B i ) has a preceding symbol block ( B i -1 ) and a subsequent symbol block ( B i +1 ) in the sequence, and wherein the symbol block ( B i ) has information symbol positions and redundancy symbol positions. Redundancy symbols are generated for the redundancy symbol positions of the symbol blocks in the sequence. First redundancy symbols (X; P r ) for the symbol block ( B i ) are generated such that symbols at positions including or excluding redundancy symbol positions along a first dimension of the preceding symbol block ( B i -1 ) concatenated with symbols at information symbol positions and the first redundancy symbols (X; P r ) along the first dimension of the symbol block ( B i ) form a codeword of a first FEC component code. Second redundancy symbols (Y; P c ) for the subsequent symbol block ( B i +1 ) are generated such that symbols at the information symbol positions along a second dimension of the symbol block ( B i ) concatenated with symbols at symbol positions excluding redundancy symbol positions and the second redundancy symbols (Y; P c ) along the second dimension of the subsequent symbol block ( B i +1 ) form a codeword of a second FEC component code. The first and second redundancy symbols (X; P r ; Y; P c ) carry the same redundancy information. The FF-SC or PFF-SC encoding concept allows easy termination and avoiding, or at least limiting, parity propagation, where a single non-zero information bit leads to an infinity extending parity sequence.

    Abstract translation: 使用阶梯编码原理的前馈或部分前馈阶梯码（FF-SC或PFF-SC），然而至少部分地不对奇偶校验位块进行重新编码。 信息符号被映射到一系列二维符号块中的信息符号位置，其中符号块（ 并且其中符号块（ B / i> ）具有信息符号位置和冗余符号位置。 针对序列中的符号块的冗余符号位置生成冗余符号。 用于符号块的第一冗余符号（X; P ） b> B ，使得在包括或排除冗余符号位置的位置处的符号 沿着前面符号块的第一维（ B i -1）与信息符号位置处的符号和第一冗余符号（X; P r 沿着符号块的第一维（ sub> ）形成第一FEC分量代码的码字。 后续符号块（ B ）的第二冗余码元（Y; P < 生成信息符号位置处的符号，从而生成信息符号位置处的符号 沿符号块（ B i ）的第二维与符号连接 在排除冗余符号位置的符号位置和沿着第二维度的第二冗余符号（Y; P c B i +1 < ）形成第二FEC分量代码的码字。 第一和第二冗余符号（X; P ; Y; ​​P c ）携带相同的冗余信息。 FF-SC或PFF-SC编码概念允许简单终止并避免或至少限制奇偶校验传播，其中单个非零信息位导致无限延伸奇偶校验序列。

    RECEIVER AND METHOD FOR PROCESSING A SIGNAL THEREOF
    4.
    发明申请
    RECEIVER AND METHOD FOR PROCESSING A SIGNAL THEREOF 审中-公开
    接收机和处理其信号的方法

    公开(公告)号：WO2017176031A1

    公开(公告)日：2017-10-12

    申请号：PCT/KR2017/003691

    申请日：2017-04-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： MYUNG, Se-ho ,  KIM, Kyung-joong ,  JEONG, Hong-sil

    IPC: H04L1/00 ,  H04L27/34

    CPC classification number: H04L1/0057 ,  H03M13/1105 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2906 ,  H03M13/3776 ,  H03M13/616 ,  H03M13/6393 ,  H04L1/0045 ,  H04L1/0065 ,  H04L1/007 ,  H04L1/0071

    Abstract: A receiver is provided. The receiver includes: a first decoder configured to decode a superposition-coded signal by using a parity check matrix to generate Low Density Parity Check (LDPC) information word bits and first parity bits corresponding to a first layer signal; an encoder configured to encode the LDPC information word bits and the first parity bits to generate second parity bits, or encode the LDPC information word bits to generate the first parity bits and the second parity bits, by using the parity check matrix; and a second decoder configured to decode a signal which is generated by removing the first layer signal, corresponding to the LDPC information word bits, the first parity bits, and the second parity bits, from the superposition-coded signal, to reconstruct bits transmitted through the second layer signal.

    Abstract translation:

    提供接收器。 该接收器包括：第一解码器，被配置为通过使用奇偶校验矩阵来解码叠加编码信号以生成与第一层信号相对应的低密度奇偶校验（LDPC）信息字比特和第一奇偶校验比特; 编码器，被配置为通过使用所述奇偶校验矩阵对所述LDPC信息字比特和所述第一奇偶校验比特进行编码以生成第二奇偶校验比特，或者对所述LDPC信息字比特进行编码以生成所述第一奇偶校验比特和所述第二奇偶校验比特; 以及第二解码器，被配置为解码通过从所述重叠编码的信号中去除对应于所述LDPC信息字比特，所述第一奇偶校验比特和所述第二奇偶校验比特的所述第一层信号而生成的信号，以重建通过 第二层信号。

    RECEIVER AND SIGNAL PROCESSING METHOD THEREOF
    5.
    发明申请
    RECEIVER AND SIGNAL PROCESSING METHOD THEREOF 审中-公开
    接收机和信号处理方法

    公开(公告)号：WO2016195331A1

    公开(公告)日：2016-12-08

    申请号：PCT/KR2016/005638

    申请日：2016-05-27

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： OH, Young-ho ,  MYUNG, Se-ho

    IPC: H03M13/27 ,  H03M13/11

    CPC classification number: H04L1/0045 ,  H03M13/09 ,  H03M13/1165 ,  H03M13/1185 ,  H03M13/152 ,  H03M13/253 ,  H03M13/255 ,  H03M13/2906 ,  H03M13/3776 ,  H04L1/0041 ,  H04L1/0057 ,  H04L1/0058 ,  H04L1/0065 ,  H04L1/0071

    Abstract: Provided is a receiver which includes at least one processor configured to control or execute: a first Bit-Interleaved Coded Modulation (BICM) decoder configured to generate a first output signal corresponding to an upper layer signal by processing a first input signal which includes a superposition coding signal generated at a transmitter by superimposing the upper layer signal and a lower layer signal; a parity generator configured to generate at least one parity based on a result of the processing of the first input signal by the first BICM decoder; and a second BICM decoder configured to generate a second output signal corresponding to the lower layer signal by processing a second input signal which is generated using the parity generated by the parity generator.

    Abstract translation: 提供了一种接收机，其包括被配置为控制或执行的至少一个处理器：第一比特交织编码调制（BICM）解码器，被配置为通过处理包括叠加的第一输入信号来产生对应于上层信号的第一输出信号 通过叠加上层信号和下层信号在发射机处产生的编码信号; 奇偶校验生成器，其被配置为基于由所述第一BICM解码器处理所述第一输入信号的结果来生成至少一个奇偶校验; 以及第二BICM解码器，被配置为通过处理使用由奇偶校验发生器产生的奇偶校验生成的第二输入信号来产生对应于较低层信号的第二输出信号。

    방송 신호 송수신 장치 및 방법
    7.
    发明申请
    방송 신호 송수신 장치 및 방법 审中-公开
    用于传播广播信号的装置和方法

    公开(公告)号：WO2016125992A1

    公开(公告)日：2016-08-11

    申请号：PCT/KR2015/011795

    申请日：2015-11-04

    Applicant: 엘지전자(주)

    Inventor： 김재형 ,  고우석 ,  홍성룡

    IPC: H04L27/26 ,  H04L1/00

    CPC classification number: H04L27/2602 ,  H03M13/09 ,  H03M13/1102 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/271 ,  H03M13/2906 ,  H04L1/0041 ,  H04L1/0052 ,  H04L1/0057 ,  H04L1/0065 ,  H04L1/0071 ,  H04L12/18 ,  H04L12/189 ,  H04L27/2607 ,  H04L27/2613 ,  H04L27/2628 ,  H04L27/265

    Abstract: 방송 신호 수신기가 개시된다. 본 발명에 따른 방송 신호 수신기는, 수신된 방송 신호에 대해 신호 검출 및 OFDM 복조를 수행하는 동기화/복조 모듈; 상기 방송 신호의 신호 프레임을 파싱하고 디인터리빙을 수행하는 프레임 파싱 및 디인터리빙 모듈; 상기 방송 신호의 적어도 하나의 PLP(Physical Layer Pipe)의 데이터를 비트 도메인으로 변환하고 FEC 디코딩을 수행하는 디매핑 및 디코딩 모듈; 및 상기 적어도 하나의 PLP의 데이터를 수신하여 데이터 스트림을 출력하는 아웃풋 프로세싱 모듈을 포함한다.

    Abstract translation: 公开了广播信号接收机。 根据本发明的一个实施例的广播信号接收机包括：用于检测信号并对接收到的广播信号执行OFDM解调的同步/解调模块; 帧解析和解交织模块，用于解析广播信号的信号帧并对其进行解交织; 用于将广播信号的至少一个物理层管道（PLP）中的数据转换为比特域并执行FEC解码的解映射和解码模块; 以及输出处理模块，用于接收所述至少一个PLP的数据并输出数据流。

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