公开(公告)号：WO2008154309A1

公开(公告)日：2008-12-18

申请号：PCT/US2008/065970

申请日：2008-06-05

Applicant: SANDISK CORPORATION ,  CONLEY, Kevin, M. ,  HOLTZMAN, Michael ,  SELA, Rotem ,  BARZILAI, Ron ,  JOGAND-COULOMB, Fabrice, E.

Inventor： CONLEY, Kevin, M. ,  HOLTZMAN, Michael ,  SELA, Rotem ,  BARZILAI, Ron ,  JOGAND-COULOMB, Fabrice, E.

IPC: G06F21/00

CPC classification number: G06F21/10 ,  G06F21/725 ,  G06F2221/0771

Abstract: A memory device for using time from a trusted host device and a method for use therewith are disclosed. In one embodiment, an application on a memory device receives a request to perform a time-based operation from an entity authenticated by the memory device, wherein the entity is running on a host device. The application selects time from the host device instead of time from a time module on the memory device to perform the time-based operation and uses the time from the host device to perform the time-based operation. Other embodiments are disclosed, and each of the embodiments can be used alone or together in combination.

Abstract translation: 公开了一种用于从可信主机设备使用时间的存储设备及其使用方法。 在一个实施例中，存储设备上的应用从由存储器设备认证的实体接收执行基于时间的操作的请求，其中所述实体在主机设备上运行。 应用程序从主机设备中选择时间，而不是从存储设备上的时间模块开始执行时间操作，并使用主机设备执行时间操作的时间。 公开了其它实施例，并且每个实施例可以单独使用或组合使用。

公开(公告)号：WO2007079357A2

公开(公告)日：2007-07-12

申请号：PCT/US2006/062336

申请日：2006-12-19

Applicant: SANDISK CORPORATION ,  CONLEY, Kevin, M.

Inventor： CONLEY, Kevin, M.

IPC: G10L15/26

CPC classification number: G10L15/22 ,  G10L15/26

Abstract: A portable memory device ("device") is provided. The device includes a microphone for receiving a voice command from a user; and a device controller that creates a voice based template for the voice command and stores the voice based template in a plurality of non-volatile memory cells, wherein the voice based template is associated with one or more button control actions entered by the user for certain device functionality. A method for a portable memory device is provided. The method includes, recording a keyword and creating a voice based template for the keyword, wherein a processor for the portable memory device creates the voice based template and stores the voice based template in non-volatile memory cells; prompting the user to capture button control actions related to a portable memory device functionality; and associating the button control actions to the voice based template.

Abstract translation: 提供便携式存储装置（“装置”）。 该设备包括用于从用户接收语音命令的麦克风; 以及设备控制器，其创建用于语音命令的基于语音的模板并将基于语音的模板存储在多个非易失性存储器单元中，其中基于语音的模板与用户输入的一个或多个按钮控制动作相关联 设备功能。 提供了一种便携式存储装置的方法。 该方法包括：记录关键词并为关键词创建基于语音的模板，其中用于便携式存储设备的处理器创建基于语音的模板并将基于语音的模板存储在非易失性存储器单元中; 提示用户捕获与便携式存储设备功能有关的按钮控制动作; 并将按钮控制动作与基于语音的模板相关联。

公开(公告)号：WO2007056669A2

公开(公告)日：2007-05-18

申请号：PCT/US2006/060490

申请日：2006-11-02

Applicant: SANDISK CORPORATION ,  CONLEY, Kevin, M. ,  THOMPSON, E. Earle

Inventor： CONLEY, Kevin, M. ,  THOMPSON, E. Earle

IPC: G06F12/08

CPC classification number: G06F12/0866 ,  G06F2212/2112 ,  G06F2212/222 ,  Y02D10/13

Abstract: A memory module is interposed between a host and a disk drive. The memory module includes a solid-state nonvolatile memory used for caching data sent by the host for storage in the disk drive. Caching takes place under the control of a memory controller in the memory module and may be transparent to the host. The disk drive may remain spun-down when data is cached, saving power. The destination for host data may be determined based on desired speed, power consumption and expected need for that data. A host may send specific commands to the memory module to enable additional functions.

Abstract translation: 内存模块插在主机和磁盘驱动器之间。 存储器模块包括用于缓存由主机发送以存储在磁盘驱动器中的数据的固态非易失性存储器。 缓存在存储器模块中的存储器控​​制器的控制下进行，并且可能对主机是透明的。 数据缓存时，磁盘驱动器可能保持静音，节省电力。 主机数据的目的地可以基于期望的速度，功率消耗和对该数据的预期需要来确定。 主机可以向存储器模块发送特定命令以启用附加功能。

公开(公告)号：WO2005088456A3

公开(公告)日：2006-04-20

申请号：PCT/US2005007313

申请日：2005-03-07

Applicant: SANDISK CORP ,  CONLEY KEVIN M ,  ELHAMIAS REUVEN

Inventor： CONLEY KEVIN M ,  ELHAMIAS REUVEN

IPC: G11C16/06 ,  G06F12/08

CPC classification number: G06F12/0862 ,  G06F12/0804 ,  G06F12/0866 ,  G06F2212/2022 ,  G06F2212/214 ,  G06F2212/2146 ,  G06F2212/282 ,  G06F2212/502

Abstract: A buffer cache interposed between a non-volatile memory and a host may be partitioned into segments that may operate with different policies. Cache policies include write-through, write and read-look-ahead. Write-through and write back policies may improve speed. Read-look-ahead cache allows more efficient use of the bus between the buffer cache and non-volatile memory. A session command allows data to be maintained in volatile memory by guaranteeing against power loss.

Abstract translation: 介于非易失性存储器和主机之间的缓冲器高速缓存可被划分成可以不同策略操作的段。 缓存策略包括直写，写入和预读。 直写和回写策略可能会提高速度。 预读高速缓存允许在缓冲器高速缓存和非易失性存储器之间更有效地使用总线。 会话命令允许通过保证防止功率损耗来将数据保存在易失性存储器中。

公开(公告)号：WO2005088456A2

公开(公告)日：2005-09-22

申请号：PCT/US2005/007313

申请日：2005-03-07

Applicant: SANDISK CORPORATION ,  CONLEY, Kevin, M. ,  ELHAMIAS, Reuven

Inventor： CONLEY, Kevin, M. ,  ELHAMIAS, Reuven

IPC: G06F12/00

CPC classification number: G06F12/0862 ,  G06F12/0804 ,  G06F12/0866 ,  G06F2212/2022 ,  G06F2212/214 ,  G06F2212/2146 ,  G06F2212/282 ,  G06F2212/502

Abstract: A buffer cache interposed between a non-volatile memory and a host may be partitioned into segments that may operate with different policies. Cache policies include write-through, write and read-look-ahead. Write-through and write back policies may improve speed. Read-look-ahead cache allows more efficient use of the bus between the buffer cache and non-volatile memory. A session command allows data to be maintained in volatile memory by guaranteeing against power loss.

Abstract translation: 介于非易失性存储器和主机之间的缓冲器高速缓存可被划分成可以不同策略操作的段。 缓存策略包括直写，写入和预读。 直写和回写策略可能会提高速度。 预读高速缓存允许在缓冲器高速缓存和非易失性存储器之间更有效地使用总线。 会话命令允许通过保证防止功率损耗来将数据保存在易失性存储器中。

公开(公告)号：WO2005066973A1

公开(公告)日：2005-07-21

申请号：PCT/US2004/042462

申请日：2004-12-16

Applicant: SANDISK CORPORATION ,  LIN, Jason ,  CONLEY, Kevin, M. ,  CHANG, Robert, C.

Inventor： LIN, Jason ,  CONLEY, Kevin, M. ,  CHANG, Robert, C.

IPC: G11C16/10

CPC classification number: G11C16/0416 ,  G11C16/10 ,  G11C16/105 ,  G11C2216/16

Abstract: The present invention presents a non-volatile memory and method for its operation that ensures reliable mechanism for write and erase abort detection in the event of lost of power during non-volatile memory programming and erasing with minimized system performance penalty. During a multi-sector write process, an indication of a successful write in one sector is written into the overhead of the following sector at the same time as the following sector's data content is written. The last sector written will additionally have an indication of its own successful write written into its overhead. For erase, an erase abort flag in the first sector of the block can be marked after a successful erase operation.

Abstract translation: 本发明提供了一种用于其操作的非易失性存储器和方法，其确保了在非易失性存储器编程和擦除期间在最小化的系统性能损失下擦除时的写入和擦除中止检测的可靠机制。 在多扇区写入过程中，在写入下一个扇区的数据内容的同时，在一个扇区中成功写入的指示被写入下一扇区的开销。 写入的最后一个部分将另外显示自己的成功写入到其开销。 为了擦除，可以在成功擦除操作之后标记块的第一个扇区中的擦除中止标志。

公开(公告)号：WO2005066794A2

公开(公告)日：2005-07-21

申请号：PCT/US2004/042862

申请日：2004-12-16

Applicant: SANDISK CORPORATION ,  GONZALEZ, Carlos, J. ,  SOMPEL, Mark ,  CONLEY, Kevin, M.

Inventor： GONZALEZ, Carlos, J. ,  SOMPEL, Mark ,  CONLEY, Kevin, M.

IPC: G06F12/06

CPC classification number: G06F12/0607 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7208

Abstract: In a non-volatile memory storage system such as a flash EEPROM system, a controller switches the manner in which data sectors are mapped into blocks and metablocks of the memory in response to host programming and controller data consolidation patterns, in order to improve performance and reduce wear. Data are programmed into the memory with different degrees of parallelism.

Abstract translation: 在诸如闪存EEPROM系统的非易失性存储器系统中，响应于主机编程和控制器数据合并模式，控制器将数据扇区映射到存储器的块和元区块的方式切换，以便提高性能和 减少磨损。 数据被编程到具有不同程度的并行性的存储器中。

公开(公告)号：WO0217330A3

公开(公告)日：2002-06-27

申请号：PCT/US0125678

申请日：2001-08-16

Applicant: SANDISK CORP ,  CONLEY KEVIN M ,  GUTERMAN DANIEL C ,  GONZALEZ CARLOS J

Inventor： CONLEY KEVIN M ,  GUTERMAN DANIEL C ,  GONZALEZ CARLOS J

IPC: G06F12/16 ,  G06F12/00 ,  G06F12/06 ,  G11C16/02 ,  G11C16/06 ,  G11C16/10

CPC classification number: G11C16/102 ,  G11C16/105

Abstract: An improved flash EEPROM memory-based storage subsystem includes one or more flash memory arrays, each with a duplicity of data registers and a controller circuit. When data are read from a flash array into a data register, the data is copied to a second register so that, during the ensuing program operation into the same array, the data may be transferred to the controller for the purpose of checking the data validity. This creates an improved performance system that doesn't suffer data transfer latency during copy operations but that is able to guarantee the validity of the data involved in such operations.

Abstract translation: 改进的基于闪存的EEPROM存储子系统包括一个或多个闪存阵列，每个闪存阵列都有一个数据寄存器和一个控制器电路。 当数据从闪存阵列读入数据寄存器时，数据被复制到第二个寄存器，以便在随后的程序操作进入同一个阵列的过程中，可以将数据传送到控制器以检查数据有效性 。 这创建了一个改进的性能系统，它在复制操作期间不会遭受数据传输延迟，但能够保证涉及这些操作的数据的有效性。

公开(公告)号：WO2007062307A3

公开(公告)日：2007-05-31

申请号：PCT/US2006/060932

申请日：2006-11-15

Applicant: SANDISK CORPORATION ,  GUTERMAN, Daniel, C. ,  CEDAR, Yoram ,  SCHROTER, Charles ,  BARROCAS, Milton, Lourenco ,  GONZALEZ, Carlos ,  CONLEY, Kevin, M.

Inventor： GUTERMAN, Daniel, C. ,  CEDAR, Yoram ,  SCHROTER, Charles ,  BARROCAS, Milton, Lourenco ,  GONZALEZ, Carlos ,  CONLEY, Kevin, M.

IPC: G11C7/10 ,  G11C16/00 ,  G06F13/38

Abstract: A non-volatile memory device is provided with a controller and includes method that controls memory operations and to emulate the memory and communication characteristics of a legacy memory device. In this way, the memory device is compatible with a host that was originally designed to operate the legacy memory device. In particular, the controller performs the emulation to the host taking into account differences such as multibit memory, error correction requirement, memory support of overwrites, and erasable block sizes.

公开(公告)号：WO2007047110A1

公开(公告)日：2007-04-26

申请号：PCT/US2006/038808

申请日：2006-10-04

Applicant: SANDISK CORPORATION ,  GOROBETS, Sergey, Anatolievich ,  ELHAMIAS, Reuven ,  GONZALEZ, Carlos, J. ,  CONLEY, Kevin, M.

Inventor： GOROBETS, Sergey, Anatolievich ,  ELHAMIAS, Reuven ,  GONZALEZ, Carlos, J. ,  CONLEY, Kevin, M.

IPC: G06F11/10 ,  G11C29/00

CPC classification number: G06F11/106 ,  G06F11/1068 ,  G11C16/3418 ,  G11C16/3431 ,  G11C29/76

Abstract: In order to maintain the integrity of data stored in a flash memory that are susceptible to being disturbed by operations in adjacent regions of the memory, disturb events cause the data to be read, corrected and re-written before becoming so corrupted that valid data cannot be recovered. The sometimes conflicting needs to maintain data integrity and system performance are balanced by deferring execution of some of the corrective action when the memory system has other high priority operations to perform. In a memory system utilizing very large units of erase, the corrective process is executed in a manner that is consistent with efficiently rewriting an amount of data much less than the capacity of a unit of erase. Data is rewritten when severe errors are found during read operations. Portions of data are corrected and copied within the time limit for read operation. Corrected portions are written to dedicated blocks.

Abstract translation: 为了保持存储在闪速存储器中的数据的完整性，其易于被存储器的相邻区域中的操作干扰，干扰事件导致在变得如此损坏之前读取，校正和重新写入数据，使得有效数据不能 被收回 当存储系统具有执行其他高优先级操作时，通过推迟执行某些纠正措施来平衡维护数据完整性和系统性能的有时冲突的需求。 在使用非常大的擦除单位的存储器系统中，以与有效地重写远远小于擦除单位的容量的数据量相一致的方式执行校正处理。 在读取操作期间发现严重错误时，重写数据。 部分数据在读取操作的时限内得到纠正和复制。 校正的部分被写入专用块。