MULTI-ETCH PROCESS USING MATERIAL-SPECIFIC BEHAVIORAL PARAMETERS IN 3-D VIRTUAL FABRICATION ENVIRONMENT
    1.
    发明申请
    MULTI-ETCH PROCESS USING MATERIAL-SPECIFIC BEHAVIORAL PARAMETERS IN 3-D VIRTUAL FABRICATION ENVIRONMENT 审中-公开
    在三维虚拟制造环境中使用材料特定行为参数的多维程序

    公开(公告)号:WO2014159199A1

    公开(公告)日:2014-10-02

    申请号:PCT/US2014022476

    申请日:2014-03-10

    Applicant: COVENTOR INC

    CPC classification number: G06F17/5045 G06F17/5009 H01L21/02647 H01L21/76816

    Abstract: A virtual fabrication environment for semiconductor device structure development is discussed. The insertion of a multi-etch process step using material-specific behavioral parameters into a process sequence enables a multi-physics, multi- material etching process to be simulated using a suitable numerical technique. The multi-etch process step accurately and realistically captures a wide range of etch behavior and geometry to provide in a virtual fabrication system a semi-physical approach to modeling multi-material etches based on a small set of input parameters that characterize the etch behavior.

    Abstract translation: 讨论了半导体器件结构开发的虚拟制造环境。 使用材料特定的行为参数将多蚀刻工艺步骤插入工艺顺序使得能够使用合适的数值技术来模拟多物理,多材料蚀刻工艺。 多蚀刻工艺步骤准确而实际地捕获各种蚀刻行为和几何形状,以在虚拟制造系统中提供基于表征蚀刻行为的一小组输入参数对多材料蚀刻进行建模的半物理方法。

    DESIGN RULE CHECKS IN 3-D VIRTUAL FABRICATION ENVIRONMENT
    2.
    发明申请
    DESIGN RULE CHECKS IN 3-D VIRTUAL FABRICATION ENVIRONMENT 审中-公开
    3-D虚拟制作环境中的设计规则检查

    公开(公告)号:WO2014159194A1

    公开(公告)日:2014-10-02

    申请号:PCT/US2014/022451

    申请日:2014-03-10

    Applicant: COVENTOR, INC.

    CPC classification number: G06F17/5081

    Abstract: A virtual fabrication environment that enables 3D Design Rule Checks (DRCs) or Optical Rule Checks (ORCs) on 3D structural models of semiconductor devices to be performed is discussed. The virtual fabrication environment may perform 3D design rule checks, such as minimum line width, minimum space between features, and minimum contact area between adjacent materials, directly in 3D without making assumptions about the translation from 2D design data to a 3D structure effected by an integrated process flow for semiconductor devices. The required number of 3D design rule checks may therefore be significantly reduced from the number of design rule checks required in 2D environments. Embodiments may also perform the 3D design rule checks for a range of statistical variations in process and design parameters.

    Abstract translation: 讨论了在要执行的半导体器件的3D结构模型上实现3D设计规则检查(DRC)或光学规则检查(ORC)的虚拟制造环境。 虚拟制造环境可以直接在3D中执行三维设计规则检查,例如最小线宽,特征之间的最小空间和相邻材料之间的最小接触面积,而不进行关于从2D设计数据到3D结构的翻译的假设 半导体器件的集成工艺流程。 因此,可以从2D环境中所需的设计规则检查的数量显着减少所需数量的3D设计规则检查。 实施例还可以对过程和设计参数中的一系列统计变化执行3D设计规则检查。

    SYSTEM AND METHOD FOR NUMERICALLY EXPLOITING SYMMETRY WHEN USING THE BOUNDARY ELEMENT METHOD TO PERFORM COMPUTER-AIDED ENGINEERING

    公开(公告)号:WO2006083444A3

    公开(公告)日:2006-08-10

    申请号:PCT/US2005/047331

    申请日:2005-12-29

    Inventor: KORSMEYER, Tom

    Abstract: A method of numerically exploiting symmetry in a coupled electromechanical analysis, while still preserving the previously established advantages of the hybrid BEM/FEM approach for performing such analyses without exploiting symmetry is disclosed. The present invention allows advantageous acceleration techniques, which maximize analytical efficiency, to be employed for the analysis of systems with moving or deformable parts. The illustrative embodiment of the present invention is particularly applicable to simulating the physical behavior of MEMS (microelectromechanical system) devices and other complicated multi-domain devices.

    MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) VARIABLE CAPACITOR APPARATUSES AND RELATED METHODS
    7.
    发明申请
    MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) VARIABLE CAPACITOR APPARATUSES AND RELATED METHODS 审中-公开
    微电子机械系统(MEMS)可变电容器装置及相关方法

    公开(公告)号:WO03106326A2

    公开(公告)日:2003-12-24

    申请号:PCT/US0318662

    申请日:2003-06-13

    CPC classification number: H01G5/18

    Abstract: Micro-Electro-Mechanical System (MEMS) Variable Capacitor Apparatus and Related Methods. According to one embodiment, a MEMS variable capacitor is provided. The variable capacitor can include first and second electrodes being spaced apart, and at least one of the electrodes being movable when a voltage is applied across the first and second electrodes. The variable capacitor can also include a first conductive plate attached to and electrically isolated from the first electrode. Furthermore, the variable capacitor can include a second conductive plate attached to the second electrode and spaced from the first conductive plate for movement of at least one of the plates with respect to the other plate upon application of voltage across the first and second electrodes to change the capacitance between the first and second plates.

    Abstract translation: 微机电系统(MEMS)可变电容器及相关方法。 根据一个实施例,提供了一种MEMS可变电容器。 可变电容器可以包括间隔开的第一和第二电极,并且当跨越第一和第二电极施加电压时,至少一个电极是可移动的。 可变电容器还可以包括附接到第一电极并与第一电极电隔离的第一导电板。 此外,可变电容器可以包括附接到第二电极并与第一导电板间隔开的第二导电板,用于当施加电压跨越第一和第二电极以改变时,至少一个板相对于另一个板移动 第一和第二板之间的电容。

    SMALL MOLECULE SUBSTRATE BASED ENZYME ACTIVITY ASSAYS
    8.
    发明申请
    SMALL MOLECULE SUBSTRATE BASED ENZYME ACTIVITY ASSAYS 审中-公开
    小分子底物酶活性测定

    公开(公告)号:WO2003025115A1

    公开(公告)日:2003-03-27

    申请号:PCT/US2002/021438

    申请日:2002-07-08

    Applicant: COVENTOR, INC.

    Abstract: The invention relates to a method of high throughput chemical analysis comprising the steps of combining one test compound with a solution comprising m enzyme(s) and n substrate(s), wherein m is an integer equal to one or greater, n is an integer equal to one or greater, and m + n ≥ 3, incubating for a period of time said test compound within said solution, separating the chemical species in said combined solution by a chromatography step after said incubating step, and measuring the relative amounts of substrates and separately identifiable products produced therefrom by a chemical reaction catalyzed by said enzymes. The present SMSBEA assays are particularly well suited to enzyme-substrate systems in which both the substrate(s) and product(s) have mobilities such that they can be separated on short chromatography columns. The method of the invention is also particularly well suited to HTS applications in which an enzyme agonist or antagonist is sought. An advantage of the method is that the effects of a test compound on several enzymes may be analyzed simultaneously and without substantial purification of the enzyme solution, e.g., whole cell lysates.

    Abstract translation: 本发明涉及一种高通量化学分析方法,包括以下步骤:将一种测试化合物与包含m种酶和n种底物的溶液组合,其中m为等于或大于1的整数,n为整数 等于一个或多个,并且m + n> / = 3,将所述测试化合物在所述溶液内孵育一段时间,在所述孵育步骤之后通过色谱步骤分离所述组合溶液中的化学物质,并测量相对量 的底物和通过所述酶催化的化学反应由其产生的可分离鉴定的产物。 目前的SMSBEA测定法特别适用于酶底物系统,其中底物和产物都具有迁移率,使得它们可以在短层析柱上分离。 本发明的方法还特别适用于寻求酶促激动剂或拮抗剂的HTS应用。 该方法的优点在于可以同时分析测试化合物对几种酶的影响,而不需要基本上纯化酶溶液,例如全细胞裂解物。

    MICROFABRICATED SEPARATION DEVICE EMPLOYING A VIRTUAL WALL FOR INTERFACING FLUIDS
    9.
    发明申请
    MICROFABRICATED SEPARATION DEVICE EMPLOYING A VIRTUAL WALL FOR INTERFACING FLUIDS 审中-公开
    使用虚拟墙的微孔分离装置,用于接合流体

    公开(公告)号:WO2003001192A1

    公开(公告)日:2003-01-03

    申请号:PCT/US2002/019933

    申请日:2002-06-20

    Applicant: COVENTOR, INC.

    Abstract: A fluid interface port (15) in a separation device for separating a sample into different components is provided. The separation device includes an array of separation channels (500) and the fluid interface port (17) comprises an opening formed in the side wall of a separation channel (500) sized and dimensioned to form a virtual wall (15) when the separation channel is filled with a separation medium (20). The fluid interface port (17) is utilized to introduce a liquid sample (19a) into the separation medium (20). The interface ports (17) formed in the array of separation channels (500) are organized into one or more sample injectors. A cathode reservoir is multiplexed with one or more separation channels. To complete an electrical path, an anode reservoir which is common to some or all separation channels (500) is also provided.

    Abstract translation: 提供了用于将样品分离成不同部件的分离装置中的流体接口端口(15)。 分离装置包括分离通道(500)的阵列,并且流体接口端口(17)包括形成在分离通道(500)的侧壁中的开口,其尺寸和尺寸被设计成形成虚拟壁(15),当分离通道 填充有分离介质(20)。 流体接口端口(17)用于将液体样品(19a)引入分离介质(20)。 形成在分离通道(500)的阵列中的接口端口(17)被组织成一个或多个样品注射器。 阴极储存器与一个或多个分离通道多路复用。 为了完成电路径,还提供了一些或所有分离通道(500)共同的阳极储存器。

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