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1.发明申请
公开(公告)号：WO2010124059A2
公开(公告)日：2010-10-28
申请号：PCT/US2010032008
申请日：2010-04-22
IPC分类号： H01L31/0392
CPC分类号： H01L31/18 , C22C21/00 , C22C28/00 , H01L31/0392 , H01L31/03926 , H01L31/1852 , H01L31/1896 , Y02E10/544 , Y10T428/12986
摘要： Methods for forming semiconductor devices include providing a textured template, forming a buffer layer over the textured template, forming a substrate layer over the buffer layer, removing the textured template, thereby exposing a surface of the buffer layer, removing oxide from the exposed surface of the buffer layer, and forming a semiconductor layer over the exposed surface of the buffer layer.
摘要翻译： 用于形成半导体器件的方法包括提供纹理化模板，在纹理化模板上形成缓冲层，在缓冲层上形成衬底层，去除纹理化模板，从而暴露缓冲层的表面，从曝光表面去除氧化物 缓冲层，并且在缓冲层的暴露表面上形成半导体层。
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2.发明申请LARGE-GRAIN CRYSTALLINE THIN-FILM STRUCTURES AND DEVICES AND METHODS FOR FORMING THE SAME 审中-公开大晶粒薄膜薄膜结构及其形成方法及其形成方法
公开(公告)号：WO2010088366A1
公开(公告)日：2010-08-05
申请号：PCT/US2010/022381
申请日：2010-01-28
CPC分类号： H01L21/02425 , H01L21/02433 , H01L21/02491 , H01L21/02516 , H01L21/02521 , H01L21/02609 , H01L31/1872 , Y02E10/50 , Y02P70/521
摘要： Methods for forming semiconductor devices include providing a crystalline template having an initial grain size, annealing the crystalline template, the annealed template having a final grain size larger than the initial grain size, forming a buffer layer over the annealed template, and forming a semiconductor layer over the buffer layer.
摘要翻译： 用于形成半导体器件的方法包括提供具有初始晶粒尺寸的晶体模板，退火晶体模板，退火模板具有比初始晶粒尺寸更大的最终晶粒尺寸，在退火模板上形成缓冲层，以及形成半导体层 在缓冲层上。
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3.发明申请
公开(公告)号：WO2016196759A1
公开(公告)日：2016-12-08
申请号：PCT/US2016/035462
申请日：2016-06-02
申请人： TESSOLAR INC. , PRETORIUS, Jacob, Van Reenen , EVERMAN, Michael , FRITZEMEIER, Leslie, G. , FERRARA, Marco
IPC分类号： H01L31/042 , H01L31/048 , H02S20/23 , H02S20/10 , H02S20/32 , H01L31/05 , H01L31/02
CPC分类号： H01L31/048 , H01L31/022425 , H01L31/0504 , H01L31/0508 , Y02B10/12 , Y02E10/50
摘要： A method for encapsulating photovoltaic cells into single functional units is described. These units share the mechanical and electric properties of the encapsulation layers and allow for flexible module architecture to be implemented at the cell level. This enables cost reduction and improved performance of photovoltaic power generation.
摘要翻译： 描述了将光伏电池封装成单个功能单元的方法。 这些单元共享封装层的机械和电气特性，并允许在单元级实现灵活的模块架构。 这使得能够降低成本并提高光伏发电的性能。
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4.发明申请
公开(公告)号：WO2009059128A3
公开(公告)日：2010-06-17
申请号：PCT/US2008081984
申请日：2008-10-31
发明人： FRITZEMEIER LESLIE G
IPC分类号： H01L31/0304 , H01L21/205 , H01L31/0392 , H01L31/068 , H01L31/18 , H01L33/00 , H01L33/12
CPC分类号： H01L33/007 , H01L21/02367 , H01L21/02491 , H01L21/02505 , H01L21/02521 , H01L31/0304 , H01L31/0392 , H01L31/03926 , H01L31/0693 , H01L31/1852 , H01L33/12 , H01S5/0215 , Y02E10/544
摘要： Methods for forming semiconductor devices include providing a textured template, forming a buffer layer over the textured template, forming a substrate layer over the buffer layer, removing the textured template, thereby exposing a surface of the buffer layer, and forming a semiconductor layer over the exposed surface of the buffer layer. In various embodiments, semiconductor structures include a substantially untextured substrate layer, a textured buffer layer disposed over the substrate layer, and a semiconductor layer disposed over the textured buffer layer.
摘要翻译： 用于形成半导体器件的方法包括提供纹理化模板，在纹理化模板上形成缓冲层，在缓冲层上形成衬底层，去除纹理化模板，从而暴露缓冲层的表面，以及形成半导体层 缓冲层的暴露表面。 在各种实施例中，半导体结构包括基本上未纹理化的衬底层，设置在衬底层上的织构缓冲层，以及设置在纹理缓冲层上的半导体层。
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5.发明申请
公开(公告)号：WO2009059128A2
公开(公告)日：2009-05-07
申请号：PCT/US2008/081984
申请日：2008-10-31
CPC分类号： H01L33/007 , H01L21/02367 , H01L21/02491 , H01L21/02505 , H01L21/02521 , H01L31/0304 , H01L31/0392 , H01L31/03926 , H01L31/0693 , H01L31/1852 , H01L33/12 , H01S5/0215 , Y02E10/544
摘要： Methods for forming semiconductor devices include providing a textured template, forming a buffer layer over the textured template, forming a substrate layer over the buffer layer, removing the textured template, thereby exposing a surface of the buffer layer, and forming a semiconductor layer over the exposed surface of the buffer layer. In various embodiments, semiconductor structures include a substantially untextured substrate layer, a textured buffer layer disposed over the substrate layer, and a semiconductor layer disposed over the textured buffer layer.
摘要翻译： 用于形成半导体器件的方法包括提供纹理化模板，在纹理化模板上形成缓冲层，在缓冲层上形成衬底层，去除纹理化模板，从而暴露缓冲层的表面，以及形成半导体层 缓冲层的暴露表面。 在各种实施例中，半导体结构包括基本上未纹理化的衬底层，设置在衬底层上的织构缓冲层，以及设置在纹理缓冲层上的半导体层。
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公开(公告)号：WO2007025062A3
公开(公告)日：2007-11-29
申请号：PCT/US2006033115
申请日：2006-08-24
发明人： FRITZEMEIER LESLIE G
IPC分类号： H01L31/00
CPC分类号： H01L31/0392 , H01L31/0304 , H01L31/03926 , H01L31/0693 , H01L31/1852 , Y02E10/544 , Y02P70/521
摘要： A template for growth of an anticipated semiconductor film has a deformation textured substrate. The template also has an intermediate epitaxial film coupled to the deformation textured substrate, the intermediate epitaxial film being chemically compatible and substantially lattice matched with the anticipated semiconductor film. A method of manufacturing a template for the growth of an anticipated semiconductor is also disclosed. A substrate is deformed to produce a textured surface. An intermediate epitaxial film, chemically compatible and substantially lattice matched with the anticipated semiconductor film, is deposited. A further disclosed photovoltaic device has a semiconductor layer, a deformation textured substrate, and an intermediate epitaxial film coupled to the deformation textured substrate. The intermediate epitaxial film is chemically compatible and substantially lattice matched with the semiconductor layer. The semiconductor layer is epitaxially grown on the intermediate epitaxial film.
摘要翻译： 用于预期半导体膜生长的模板具有变形织构化衬底。 模板还具有耦合到变形织构化衬底的中间外延膜，该中间外延膜化学兼容且与预期半导体膜基本晶格匹配。 还公开了一种制造用于生长预期半导体的模板的方法。 衬底变形以产生纹理表面。 沉积与预期的半导体膜化学相容且基本晶格匹配的中间外延膜。 进一步公开的光伏器件具有半导体层，变形织构化衬底和耦合到变形织构化衬底的中间外延膜。 中间外延膜与半导体层化学兼容并且基本上晶格匹配。 半导体层在中间外延膜上外延生长。
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公开(公告)号：WO2007025062A2
公开(公告)日：2007-03-01
申请号：PCT/US2006/033115
申请日：2006-08-24
IPC分类号： H01L31/00
CPC分类号： H01L31/0392 , H01L31/0304 , H01L31/03926 , H01L31/0693 , H01L31/1852 , Y02E10/544 , Y02P70/521
摘要： A template for growth of an anticipated semiconductor film has a deformation textured substrate. The template also has an intermediate epitaxial film coupled to the deformation textured substrate, the intermediate epitaxial film being chemically compatible and substantially lattice matched with the anticipated semiconductor film. A method of manufacturing a template for the growth of an anticipated semiconductor is also disclosed. A substrate is deformed to produce a textured surface. An intermediate epitaxial film, chemically compatible and substantially lattice matched with the anticipated semiconductor film, is deposited. A further disclosed photovoltaic device has a semiconductor layer, a deformation textured substrate, and an intermediate epitaxial film coupled to the deformation textured substrate. The intermediate epitaxial film is chemically compatible and substantially lattice matched with the semiconductor layer. The semiconductor layer is epitaxially grown on the intermediate epitaxial film.
摘要翻译： 用于生长预期半导体膜的模板具有变形纹理化衬底。 模板还具有耦合到变形织构化衬底的中间外延膜，中间外延膜化学兼容并且与预期的半导体膜基本上晶格匹配。 还公开了制造用于生长预期半导体的模板的方法。 基板变形以产生纹理表面。 沉积与期望的半导体膜化学相容并且基本上晶格匹配的中间外延膜。 进一步公开的光伏器件具有半导体层，变形织构化衬底和耦合到变形织构化衬底的中间外延膜。 中间外延膜与化学兼容并且与半导体层基本上晶格匹配。 在中间外延膜上外延生长半导体层。
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公开(公告)号：WO2010124059A3
公开(公告)日：2010-10-28
申请号：PCT/US2010/032008
申请日：2010-04-22
申请人： WAKONDA TECHNOLOGIES, INC. , LEITZ, Christopher , VINEIS, Christopher, J. , FRITZEMEIER, Leslie, G.
IPC分类号： H01L31/0392
摘要： Methods for forming semiconductor devices include providing a textured template, forming a buffer layer over the textured template, forming a substrate layer over the buffer layer, removing the textured template, thereby exposing a surface of the buffer layer, removing oxide from the exposed surface of the buffer layer, and forming a semiconductor layer over the exposed surface of the buffer layer.
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