公开(公告)号：WO2009076437A1

公开(公告)日：2009-06-18

申请号：PCT/US2008/086221

申请日：2008-12-10

Applicant: ATI TECHNOLOGIES ULC ,  HUNKINS, James, D. ,  KING, Lawrence, J. ,  KODURI, Raja

Inventor： HUNKINS, James, D. ,  KING, Lawrence, J. ,  KODURI, Raja

IPC: H01R12/22 ,  G06F13/40 ,  H05K7/20

CPC classification number: H01R12/7082 ,  H01R12/724 ,  H01R2201/06

Abstract: In one example an electronic device includes a housing that includes an A/C input or DC input, and at least one circuit substrate that includes electronic circuitry, such as graphics processing circuitry that receives power based on the A/C input or DC input. The electronic device also includes a divided multi- connector element differential bus connector that is coupled to the electronic circuitry. The divided multi-connector element differential bus connector includes a single housing that connects with the circuit substrate and the connector housing includes therein a divided electronic contact configuration comprised of a first group of electrical contacts divided from an adjacent second group of mirrored electrical contacts wherein each group of electrical connects includes a row of at least lower and upper contacts. In one example, the electronic device housing includes air flow passages, such as grills, adapted to provide air flow through the housing. The electronic device housing further includes a passive or active cooling mechanism such as a fan positioned to cool the circuitry during normal operation. In one example, the electronic device does not include a host processor and instead a host processor is in a separate electronic device that communicates with the graphics processing circuitry through the divided multi connector element differential bus connector. In another example, a CPU (or one or more CPUs) is also co-located on the circuit substrate with the circuitry to provide a type of parallel host processing capability with an external device.

Abstract translation: 在一个示例中，电子设备包括包括A / C输入或DC输入的壳体，以及包括电子电路的至少一个电路基板，诸如基于A / C输入或DC输入接收功率的图形处理电路。 电子设备还包括耦合到电子电路的分开的多连接器元件差分总线连接器。 分离的多连接器元件差分总线连接器包括与电路基板连接的单个壳体，并且连接器壳体包括分开的电子接触配置，其包括由相邻的第二组镜像电触点分开的第一组电触点，其中每个 电连接组包括一排至少下部和上部触点。 在一个示例中，电子设备壳体包括适于提供空气流过壳体的空气流通道，例如格栅。 电子设备外壳还包括无源或主动冷却机构，例如风扇，其定位成在正常操作期间冷却电路。 在一个示例中，电子设备不包括主机处理器，而是主机处理器位于通过分开的多连接器元件差分总线连接器与图形处理电路通信的单独的电子设备中。 在另一示例中，CPU（或一个或多个CPU）也与电路共同位于电路基板上，以提供与外部设备的并行主机处理能力的类型。

公开(公告)号：WO2007129216A2

公开(公告)日：2007-11-15

申请号：PCT/IB2007/001231

申请日：2007-05-01

Applicant: ATI TECHNOLOGIES ULC ,  ATI INTERNATIONAL SRL ,  KODURI, Raja ,  ELDER, Gordon ,  GOLDS, Jeff

Inventor： KODURI, Raja ,  ELDER, Gordon ,  GOLDS, Jeff

IPC: G06T11/20

CPC classification number: G06T15/503 ,  G06F3/14 ,  G06T7/13 ,  G06T11/203 ,  G06T15/005 ,  G06T2210/08 ,  G06T2210/52 ,  G09G5/001 ,  G09G5/363

Abstract: A method and apparatus for performing multisampling-based antialiasing in a system that includes first and second graphics processing unit (GPUs) that reduces the amount of data transferred between the GPUs and improves the efficiency with which such data is transferred. The first GPU renders a first version of a frame using a first multisarnpling pattern and the second GPU renders a second version of a frame in the second GPU using a second multisampling pattern. The second GPU identifies non-edge pixels in the second version of the frame. The pixels in the first version of the frame are then combined with only those pixels in the second version of the frame that have not been identified as non-edge ixels to generate a combined frame.

Abstract translation: 一种用于在包括第一和第二图形处理单元（GPU）的系统中执行基于多采样的抗锯齿的方法和装置，该图形处理单元减少了在GPU之间传送的数据量，并提高了传送这些数据的效率。 第一GPU使用第一多重扫描模式呈现帧的第一版本，并且第二GPU使用第二多采样模式在第二GPU中呈现帧的第二版本。 第二个GPU识别帧的第二个版本中的非边缘像素。 然后，帧的第一版本中的像素仅与尚未被识别为非边缘像素的帧的第二版本中的那些像素组合以生成组合帧。

公开(公告)号：WO2010085771A1

公开(公告)日：2010-07-29

申请号：PCT/US2010/022018

申请日：2010-01-25

Applicant: ADVANCED MICRO DEVICES, INC. ,  SCHMIT, Michael, L. ,  ERENBEN, Korhan ,  KODURI, Raja

Inventor： SCHMIT, Michael, L. ,  ERENBEN, Korhan ,  KODURI, Raja

IPC: G09G5/36 ,  G09G5/39 ,  G09G5/00 ,  G06F12/08

CPC classification number: G09G5/001 ,  G09G5/363 ,  G09G5/39

Abstract: Embodiments of a method and apparatus for using graphics memory (also referred to as video memory 212) for non-graphics related tasks are disclosed herein In an embodiment a graphics processing unit (GPU 302) includes a VRAM cache module (204) with hardware and software to provide and manage additional cache resources for a central processing unit (CPU) In an embodiment, the VRAM cache module includes a VRAM cache driver (404) that registers with the CPU, accepts read requests from the CPU, and uses the VRAM cache to service the requests. In various embodiments, the VRAM cache is configurable to be the only GPU cache or alternatively, to be a first level cache, second level cache, etc.

Abstract translation: 本文公开了一种用于非图形相关任务的图形存储器（也称为视频存储器212）的方法和装置的实施例。在一个实施例中，图形处理单元（GPU 302）包括具有硬件的VRAM高速缓存模块（204） 提供和管理用于中央处理单元（CPU）的附加高速缓存资源的软件在一个实施例中，VRAM高速缓存模块包括向CPU注册的VRAM高速缓存驱动器（404），接受来自CPU的读取请求，并使用VRAM缓存 服务请求。 在各种实施例中，VRAM高速缓存可配置为唯一的GPU高速缓存或备选地，作为第一级高速缓存，第二级高速缓存等

公开(公告)号：WO2007129216A3

公开(公告)日：2008-10-16

申请号：PCT/IB2007001231

申请日：2007-05-01

Applicant: ATI TECHNOLOGIES ULC ,  ATI INT SRL ,  KODURI RAJA ,  ELDER GORDON ,  GOLDS JEFF

Inventor： KODURI RAJA ,  ELDER GORDON ,  GOLDS JEFF

IPC: G06T11/20 ,  G06T15/50

CPC classification number: G06T15/503 ,  G06F3/14 ,  G06T7/13 ,  G06T11/203 ,  G06T15/005 ,  G06T2210/08 ,  G06T2210/52 ,  G09G5/001 ,  G09G5/363

Abstract: A method and apparatus for performing multisampling-based antialiasing in a system that includes first and second graphics processing unit (GPUs) that reduces the amount of data transferred between the GPUs and improves the efficiency with which such data is transferred. The first GPU renders a first version of a frame using a first multisarnpling pattern and the second GPU renders a second version of a frame in the second GPU using a second multisampling pattern. The second GPU identifies non-edge pixels in the second version of the frame. The pixels in the first version of the frame are then combined with only those pixels in the second version of the frame that have not been identified as non-edge ixels to generate a combined frame.

Abstract translation: 一种用于在包括第一和第二图形处理单元（GPU）的系统中执行基于多采样的抗锯齿的方法和装置，该图形处理单元减少了在GPU之间传送的数据量，并提高了传送这些数据的效率。 第一GPU使用第一多重扫描模式呈现帧的第一版本，并且第二GPU使用第二多采样模式在第二GPU中呈现帧的第二版本。 第二个GPU识别帧的第二个版本中的非边缘像素。 然后将帧的第一版本中的像素与尚未被识别为非边缘像素的帧的第二版本中的那些像素组合以生成组合帧。