公开(公告)号：WO2007086924B1

公开(公告)日：2007-09-13

申请号：PCT/US2006020139

申请日：2006-05-24

Applicant: TECHNOCONCEPTS INC

Inventor： HICKLING RONALD M

IPC: H03M3/00

CPC classification number: H03H15/00 ,  H03H2015/007 ,  H03M3/324 ,  H03M3/41 ,  H03M3/504 ,  H04B1/0475 ,  H04B1/30

Abstract: A self-tuning filter that is well suited for use as a output digital filter in a direct conversion delta-sigma transmitter is constructed as a high pass finite impulse response filter (18) having a cutoff frequency of twice the desired carrier frequency. The filter is clocked using the same clock as used for the commutatation within the transmitter (11, 12, 13, 14, 16). The aliasing effect of the digital filter produces a passband centered around the carrier frequency which allows the information contained in the spectrum around the passband to be transmitted, while effectively filtering out the quantization noise produced by the commutation. When the commutator clock frequency is changed in order to change the carrier frequency, the passband automatically moves to track the new carrier frequency. The output filter may be constructed using series connected flip-flops (30(1), 30(2), 30(3), 30(n)) with analog taps (32, 33, 34, 35, 36, 37, 38, 39, 30, 41) and an analog summer connected to respective Q and Q outputs, thereby producing an analog output.

Abstract translation: 非常适合用作直接转换Δ-Σ发射器中的输出数字滤波器的自调谐滤波器被构造为具有两倍于期望载波频率的截止频率的高通有限脉冲响应滤波器（18）。 滤波器使用与发射机（11,12,13,14,16）内的通信相同的时钟来计时。 数字滤波器的混叠效应产生以载波频率为中心的通带，其允许在通带周围的频谱中包含的信息被发送，同时有效地滤除由换向产生的量化噪声。 当换向器时钟频率改变以改变载波频率时，通带自动移动以跟踪新的载波频率。 输出滤波器可以使用具有模拟抽头（32,33,34,35,36,37,38）的串联连接的触发器（30（1），30（2），30（3），30（n） ，39,30,41）和连接到相应Q和Q输出的模拟加法器，从而产生模拟输出。

公开(公告)号：WO2006057649A3

公开(公告)日：2007-03-01

申请号：PCT/US2005000751

申请日：2005-01-10

Applicant: TECHNOCONCEPTS INC

Inventor： HICKLING RONALD M

IPC: H03C1/00 ,  H03C5/00 ,  H03K7/00 ,  H03K7/08 ,  H03K9/08 ,  H04B14/06 ,  H04L27/12

CPC classification number: H03C3/40 ,  H03M3/40 ,  H03M3/50 ,  H04B1/69 ,  H04B14/062

Abstract: A flexible and programmable circuit for generating a radio frequency signal for transmission includes two delta-sigma modulators (62,64), a quadrature clock generator (70) for generating two clock signals (71, 73) having a 90 degree phase difference, two commutators (66, 68) for multiplying the two modulator outputs by +1 and -1 on alternating half cycles of the two quadrature clock signals respectively, a summer (80) for summing the two commutated outputs, and a filter (82) for removing unwanted frequency components before transmission. The circuit directly generates a radio frequency signal without the need for additional frequency translation after the commutation stage.

Abstract translation: 用于产生用于传输的射频信号的灵活且可编程的电路包括两个Δ-Σ调制器（62,64），用于产生具有90度相位差的两个时钟信号（71,73）的正交时钟发生器（70） 用于在两个正交时钟信号的交替半周期上将两个调制器输出乘以+1和-1的换向器（66,68），用于对两个换向输出求和的加法器（80）和用于去除 传输前不需要的频率分量。 电路直接产生射频信号，而不需要在换向级之后进行额外的频率转换。

公开(公告)号：WO2007030164A3

公开(公告)日：2009-04-23

申请号：PCT/US2006020004

申请日：2006-05-24

Applicant: TECHNOCONCEPTS INC

Inventor： HICKLING RONALD M

IPC: H03F3/45

CPC classification number: H03F1/3211 ,  H03F1/3276 ,  H03F3/45085 ,  H03F3/45183 ,  H03F2200/331 ,  H03F2203/45644

Abstract: An amplifier compensates for inherent non-linearities in its open loop behavior by using a first amplification stage configured as a voltage follower (1002, 1004) to follow an input voltage, which produces a signal that corresponds to the inverse of the non-linear transfer characteristic of the open loop amplifier (1002) used within that first stage, and using that inverse signal as the minus input to a second amplifier stage (1000) which is matched to the first amplifier stage. The result is that the output of the second amplifier stage (1000) has a highly linear response to the input voltage. The linear commutating amplifier may be applied to perform the commutation function within a direct conversion delta-sigma transmitter or a direct conversion delta-sigma receiver.

Abstract translation: 放大器通过使用配置为电压跟随器（1002,1004）的第一放大级来补偿其开环行为中的固有非线性，以跟随输入电压，该输入电压产生对应于非线性转移的反相的信号 在第一级中使用的开环放大器（1002）的特性，并且将该反相信号用作与第一放大级匹配的第二放大器级（1000）的负输入。 结果是第二放大器级（1000）的输出对输入电压具有高线性响应。 可以应用线性换向放大器以在直接变换Δ-Σ发射器或直接变换Δ-Σ接收器内执行换向功能。

公开(公告)号：WO0046926A3

公开(公告)日：2001-02-15

申请号：PCT/US0002665

申请日：2000-02-02

Applicant: TECHNOCONCEPTS INC ,  HICKLING RONALD M

Inventor： HICKLING RONALD M

IPC: H04B1/28 ,  H03M3/02 ,  H04L27/233

CPC classification number: H04B1/0014 ,  H04B1/0039 ,  H04B1/28

Abstract: A wireless receiver receives a wireless signal by inverting the polarity of an incoming waveform on every one half clock cycle of a conversion clock to produce a commutated waveform and converting said commutated waveform to a series of representative digital values using a delta-sigma modulator clocked by said conversion clock. In this way, the receiver operates over a large dynamic range and the use of automatic gain control in the front end may be eliminated.

Abstract translation: 无线接收器通过在转换时钟的每半个时钟周期反转输入波形的极性来接收无线信号，以产生换向波形，并使用由Δ-Σ调制器转换所述换向波形到一系列代表数字值 表示转换时钟。 以这种方式，接收器在大的动态范围内工作，并且可以消除在前端使用自动增益控制。

公开(公告)号：WO2007044149A3

公开(公告)日：2009-04-23

申请号：PCT/US2006033995

申请日：2006-08-31

Applicant: TECHNOCONCEPTS INC

Inventor： PANFILOV OLEG ,  HICLING RONALD M ,  TURGEON ANTONIO

IPC: H04B1/00 ,  H03D1/04 ,  H04B1/10 ,  H04B7/00

CPC classification number: H04B1/7101

Abstract: An interference canceller for canceling narrowband interference from a received broadband signal takes advantage of the fact that the correlation time for the narrowband interference signal will be significantly greater than the correlation time for the desirable broadband signal. The interference canceller operates by creating a replica of the narrowband interference signal in an auxiliary channel and subtracts it from the main channel to cancel the interference. The auxiliary channel has a delay time larger than the correlation time of the desirable broadband signal. In-phase and quadrature versions of the delayed signal are multiplied by respective weights and subtracted from the received signal to produce an interference-reduced signal. The weights are adjusted by an adaptive block to minimize the power in the interference-reduced output signal.

Abstract translation: 用于消除来自接收到的宽带信号的窄带干扰的干扰消除器利用了窄带干扰信号的相关时间将显着大于所需宽带信号的相关时间的事实。 干扰消除器通过在辅助信道中创建窄带干扰信号的副本来操作，并从主信道中减去干扰消除以消除干扰。 辅助通道的延迟时间大于所需宽带信号的相关时间。 将延迟信号的同相和正交版本乘以相应的权重并从接收信号中减去以产生干扰减小信号。 通过自适应块来调整权重以最小化干扰减小的输出信号中的功率。

公开(公告)号：WO2007030164A2

公开(公告)日：2007-03-15

申请号：PCT/US2006/020004

申请日：2006-05-24

Applicant: TECHNOCONCEPTS, INC.

Inventor： HICKLING, Ronald, M.

IPC: H03F3/68

CPC classification number: H03F1/3211 ,  H03F1/3276 ,  H03F3/45085 ,  H03F3/45183 ,  H03F2200/331 ,  H03F2203/45644

Abstract: An amplifier compensates for inherent non-linearities in its open loop behavior by using a first amplification stage configured as a voltage follower (1002, 1004) to follow an input voltage, which produces a signal that corresponds to the inverse of the non-linear transfer characteristic of the open loop amplifier (1002) used within that first stage, and using that inverse signal as the minus input to a second amplifier stage (1000) which is matched to the first amplifier stage. The result is that the output of the second amplifier stage (1000) has a highly linear response to the input voltage. The linear commutating amplifier may be applied to perform the commutation function within a direct conversion delta-sigma transmitter or a direct conversion delta-sigma receiver.

Abstract translation: 放大器通过使用配置为电压跟随器（1002,1004）的第一放大级来补偿其开环行为中的固有非线性，以跟随输入电压，该输入电压产生对应于非线性转移的反相的信号 在第一级中使用的开环放大器（1002）的特性，并且将该反相信号用作与第一放大级匹配的第二放大器级（1000）的负输入。 结果是第二放大器级（1000）的输出对输入电压具有高线性响应。 可以应用线性换向放大器以在直接变换Δ-Σ发射器或直接变换Δ-Σ接收器内执行换向功能。

公开(公告)号：WO1996012349A1

公开(公告)日：1996-04-25

申请号：PCT/US1995012856

申请日：1995-10-13

Applicant: TECHNOCONCEPTS, INC.

Inventor： TECHNOCONCEPTS, INC. ,  HICKLING, Ronald, M.

IPC: H03M01/12

CPC classification number: H03M1/0682 ,  H03K5/2481 ,  H03M1/365

Abstract: A differential comparator circuit for an Analog-to-digital Converter (ADC) or other application includes a plurality of differential comparators (16) and a plurality of offset voltage generators. Each comparator includes first (T1, T2) and second (T3, T4) differentially connected transistor pairs having equal and opposite voltage offsets. First (T5) and second (T6) offset control transistors are connected in series with the transistor pairs respectively. The offset voltage generators generate offset voltages corresponding to reference voltages which are compared with a differential input voltage by the comparators. Each offset voltage is applied to the offset control transistors of at least one comparator to set the overall voltage offset of the comparator to a value corresponding to the respective reference voltage.

Abstract translation: 用于模数转换器（ADC）或其他应用的差分比较器电路包括多个差分比较器（16）和多个偏移电压发生器。 每个比较器包括具有相等和相反电压偏移的第一（T1，T2）和第二（T3，T4）差分连接的晶体管对。 第一（T5）和第二（T6）偏移控制晶体管分别与晶体管对串联。 偏移电压发生器产生与参考电压相对应的偏移电压，该参考电压与比较器的差分输入电压进行比较。 每个偏移电压被施加到至少一个比较器的偏移控制晶体管，以将比较器的总体电压偏移设置为对应于各个参考电压的值。

公开(公告)号：WO2007086924A1

公开(公告)日：2007-08-02

申请号：PCT/US2006/020139

申请日：2006-05-24

Applicant: TECHNOCONCEPTS, INC.

Inventor： HICKLING, Ronald, M.

IPC: H03M3/00

CPC classification number: H03H15/00 ,  H03H2015/007 ,  H03M3/324 ,  H03M3/41 ,  H03M3/504 ,  H04B1/0475 ,  H04B1/30

Abstract: A self-tuning filter that is well suited for use as a output digital filter in a direct conversion delta-sigma transmitter is constructed as a high pass finite impulse response filter (18) having a cutoff frequency of twice the desired carrier frequency. The filter is clocked using the same clock as used for the commutatation within the transmitter (11, 12, 13, 14, 16). The aliasing effect of the digital filter produces a passband centered around the carrier frequency which allows the information contained in the spectrum around the passband to be transmitted, while effectively filtering out the quantization noise produced by the commutation. When the commutator clock frequency is changed in order to change the carrier frequency, the passband automatically moves to track the new carrier frequency. The output filter may be constructed using series connected flip-flops (30(1), 30(2), 30(3), 30(n)) with analog taps (32, 33, 34, 35, 36, 37, 38, 39, 30, 41) and an analog summer connected to respective Q and Q outputs, thereby producing an analog output.

Abstract translation: 在直接转换德耳塔西格玛发射机中很适合用作输出数字滤波器的自调谐滤波器被构造为高通有限脉冲响应滤波器（18），其截止频率为 是期望的载波频率的两倍。 滤波器使用与发射机内换向所使用的时钟相同的时钟（11,12,13,14,16）。 数字滤波器的混叠效应产生一个以载波频率为中心的通带，它允许传输包含在通带周围的频谱中的信息，同时有效滤除由换向产生的量化噪声。 当改变换向器时钟频率以改变载波频率时，通带自动移动以跟踪新的载波频率。 输出滤波器可以用具有模拟抽头（32,33,34,35,36,37,38）的串联连接的触发器（30（1），30（2），30（3），30（n） ，39,30,41）和连接到相应Q和Q输出端的模拟加法器，从而产生模拟输出。

公开(公告)号：WO2007044149A2

公开(公告)日：2007-04-19

申请号：PCT/US2006/033995

申请日：2006-08-31

Applicant: TECHNOCONCEPTS, INC.

Inventor： PANFILOV, Oleg ,  HICLING, Ronald, M. ,  TURGEON, Antonio

IPC: H04B1/10 ,  H04B1/06

CPC classification number: H04B1/7101

Abstract: An interference canceller for canceling narrowband interference from a received broadband signal takes advantage of the fact that the correlation time for the narrowband interference signal will be significantly greater than the correlation time for the desirable broadband signal. The interference canceller operates by creating a replica of the narrowband interference signal in an auxiliary channel and subtracts it from the main channel to cancel the interference. The auxiliary channel has a delay time larger than the correlation time of the desirable broadband signal. In-phase and quadrature versions of the delayed signal are multiplied by respective weights and subtracted from the received signal to produce an interference-reduced signal. The weights are adjusted by an adaptive block to minimize the power in the interference-reduced output signal.

Abstract translation: 用于消除来自接收的宽带信号的窄带干扰的干扰消除器利用了窄带干扰信号的相关时间将显着大于所需宽带信号的相关时间的事实。 干扰消除器通过在辅助信道中创建窄带干扰信号的副本来操作，并从主信道中减去干扰消除以消除干扰。 辅助信道的延迟时间大于所需宽带信号的相关时间。 延迟信号的同相和正交版本乘以相应的权重并从接收信号中减去以产生干扰减小信号。 通过自适应块来调整权重以最小化干扰减小的输出信号中的功率。

公开(公告)号：WO2006057649A2

公开(公告)日：2006-06-01

申请号：PCT/US2005/000751

申请日：2005-01-10

Applicant: TECHNOCONCEPTS, INC.

Inventor： HICKLING, Ronald, M.

IPC: H04B14/06 ,  H04L27/20

CPC classification number: H03C3/40 ,  H03M3/40 ,  H03M3/50 ,  H04B1/69 ,  H04B14/062

Abstract: A flexible and programmable circuit for generating a radio frequency signal for transmission includes two delta-sigma modulators (62,64), a quadrature clock generator (70) for generating two clock signals (71, 73) having a 90 degree phase difference, two commutators (66, 68) for multiplying the two modulator outputs by +1 and -1 on alternating half cycles of the two quadrature clock signals respectively, a summer (80) for summing the two commutated outputs, and a filter (82) for removing unwanted frequency components before transmission. The circuit directly generates a radio frequency signal without the need for additional frequency translation after the commutation stage.

Abstract translation: 用于产生用于传输的射频信号的灵活且可编程的电路包括两个Δ-Σ调制器（62,64），用于产生具有90度相位差的两个时钟信号（71,73）的正交时钟发生器（70） 用于在两个正交时钟信号的交替半周期上将两个调制器输出乘以+1和-1的换向器（66,68），用于对两个换向输出求和的加法器（80）和用于去除 传输前不需要的频率分量。 电路直接产生射频信号，而不需要在换向级之后进行额外的频率转换。