公开(公告)号：WO2009145327A1

公开(公告)日：2009-12-03

申请号：PCT/JP2009/059919

申请日：2009-05-25

申请人： CANON KABUSHIKI KAISHA ,  WANG, Shinan ,  TAMAMORI, Kenji

发明人： WANG, Shinan ,  TAMAMORI, Kenji

IPC分类号： H01L21/20

CPC分类号： H01L21/0265 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639

摘要： A nitride semiconductor layer-containing structure having a configuration in which: the structure includes a laminated structure based on at least two nitride semiconductor layers; the structure includes between the two nitride semiconductor layers in the laminated structure a plurality of voids surrounded by the faces of the walls inclusive of the inner walls of the recessed portions of the asperity pattern formed on the nitride semiconductor layer that is the lower layer of the two nitride semiconductor layers; and crystallinity defect-containing portions to suppress the lateral growth of the nitride semiconductor layer are formed on at least part of the inner walls of the recessed portions to form the voids.

摘要翻译： 一种含氮化物半导体层的结构，其结构是：所述结构包括基于至少两个氮化物半导体层的层压结构; 该结构包括在层叠结构中的两个氮化物半导体层之间的多个空隙，其被包括在形成在作为下层的氮化物半导体层上的凹凸图案的凹部的内壁的壁的表面所包围 两个氮化物半导体层; 并且在凹部的内壁的至少一部分上形成用于抑制氮化物半导体层的横向生长的含结晶缺陷部分，形成空隙。

公开(公告)号：WO2012073545A1

公开(公告)日：2012-06-07

申请号：PCT/JP2011/063989

申请日：2011-06-10

申请人： CANON KABUSHIKI KAISHA ,  WANG, Shinan ,  NAKAMURA, Takashi ,  TESHIMA, Takayuki ,  SETOMOTO, Yutaka ,  WATANABE, Shinichiro

发明人： WANG, Shinan ,  NAKAMURA, Takashi ,  TESHIMA, Takayuki ,  SETOMOTO, Yutaka ,  WATANABE, Shinichiro

IPC分类号： C25D5/02 ,  C25D7/00 ,  C25D7/12 ,  G21K1/06 ,  H01L21/768

CPC分类号： C25D5/022 ,  C25D7/123 ,  G21K1/02 ,  G21K2207/005

摘要： A microstructure manufacturing method includes forming a first insulating film on an Si substrate, exposing an Si surface by removing a part of the first insulating film, forming a recessed portion by etching the Si substrate from the exposed Si surface, forming a second insulating film on a sidewall and a bottom of the recessed portion, forming an Si exposed surface by removing at least a part of the second insulating film formed on the bottom of the recessed portion, and filling the recessed portion with a metal from the Si exposed surface by electrolytic plating.

摘要翻译： 微结构制造方法包括在Si衬底上形成第一绝缘膜，通过去除第一绝缘膜的一部分暴露出Si表面，通过从暴露的Si表面蚀刻Si衬底形成凹陷部分，形成第二绝缘膜 所述凹部的侧壁和底部通过去除形成在所述凹部的底部上的所述第二绝缘膜的至少一部分而形成Si暴露表面，并且通过电解从所述Si暴露表面向所述凹部填充所述凹部 电镀。