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    ACTIVE INTERCONNECTS AND CONTROL POINTS IN INTEGRATED CIRCUITS
    2.
    发明申请
    ACTIVE INTERCONNECTS AND CONTROL POINTS IN INTEGRATED CIRCUITS 审中-公开
    集成电路中的主动互连和控制点

    公开(公告)号：WO2006115968A3

    公开(公告)日：2007-08-16

    申请号：PCT/US2006014856

    申请日：2006-04-19

    Applicant: HEWLETT PACKARD DEVELOPMENT CO ,  WILLIAMS R STANLEY ,  KUEKES PHILLIP J ,  PERNER FREDERICK A ,  SNIDER GREGORY S ,  STEWART DUNCAN

    Inventor： WILLIAMS R STANLEY ,  KUEKES PHILLIP J ,  PERNER FREDERICK A ,  SNIDER GREGORY S ,  STEWART DUNCAN

    IPC: H01L21/66

    CPC classification number: H05K7/1092 ,  H01L23/5228 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In various embodiments of the present invention, tunable resistors (1102) are introduced at the interconnect layer of the integrated circuits (102) in order to provide a means for adjusting internal voltage and/or current levels within the integrated circuit to repair defective components or to configure the integrated circuit following manufacture. For example, when certain internal components, such as transistors, do not have specified electronics characteristics due to manufacturing defects, adjustment of the variable resistances of the tunable resistors (1102) included in the interconnect layer of integrated circuits according to embodiments of the present invention can be used to adjust internal voltage and/or levels in order to ameliorate the defective components. In other cases, the tunable resistors may be used as switches to configure integrated circuit components, including individual transistors and logic gates as well as larger, hierarchically structured functional modules and domains. In some cases, components and modules may be turned off, while, in other cases, components and modules may be turned on.

    Abstract translation: 在本发明的各种实施例中，可调谐电阻器（1102）被引入集成电路（102）的互连层，以便提供用于调整集成电路内的内部电压和/或电流水平以修复有缺陷的部件或 配置后续制造的集成电路。 例如，当某些内部组件（例如晶体管）由于制造缺陷而没有指定的电子特性时，根据本发明的实施例调整包括在集成电路的互连层中的可调电阻器（1102）的可变电阻 可以用于调整内部电压和/或电平，以改善有缺陷的部件。 在其他情况下，可调谐电阻器可以用作开关以配置集成电路部件，包括单独的晶体管和逻辑门以及更大的分层结构的功能模块和域。 在某些情况下，可能会关闭组件和模块，而在其他情况下，可能会打开组件和模块。

    AUTONOMOUS EVANESCENT OPTICAL NANOSENSOR
    3.
    发明申请
    AUTONOMOUS EVANESCENT OPTICAL NANOSENSOR 审中-公开
    自动光纤光学传感器

    公开(公告)号：WO2007078317A2

    公开(公告)日：2007-07-12

    申请号：PCT/US2006/018158

    申请日：2006-05-10

    Applicant: HEWLETT-PACKARD DEVELOPMEMT COMPANY, L.P. ,  BEAUSOLEIL, Raymond, G. ,  KUEKES, Philip, J. ,  WILLIAMS, R., Stanley

    Inventor： BEAUSOLEIL, Raymond, G. ,  KUEKES, Philip, J. ,  WILLIAMS, R., Stanley

    IPC: G01N21/55

    CPC classification number: G01N21/7703 ,  G01N21/648 ,  G01N21/65 ,  G01N21/94 ,  G01N33/569 ,  G01N35/00871 ,  G01N2021/7786 ,  G01N2035/00881

    Abstract: A sensor (100) includes traps (130) that are adjacent to a waveguide (120) and capable of holding a contaminant for an interaction with an evanescent field surrounding the waveguide (120). When held in a trap (130), a particle of the contaminant, which may be an atom, a molecule, a virus, or a microbe, scatters light from the waveguide (120), and the scattered light can be measured to detect the presence or concentration of the contaminant. Holding of the particles permits sensing of the contaminant in a gas where movement of the particles might otherwise be too fast to permit measurement of the interaction with the evanescent field. The waveguide (120), a lighting system (140), a photosensor (150), and a communications interface (160) can all be fabricated on a semiconductor die (110) to permit fabrication of an autonomous nanosensor capable of suspension in the air or a gas being sensed.

    Abstract translation: 传感器（100）包括与波导（120）相邻并且能​​够保持用于与围绕波导（120）的ev逝场的相互作用的污染物的阱（130）。 当保持在捕获器（130）中时，可以是原子，分子，病毒或微生物的污染物的颗粒从波导（120）散射光，并且可以测量散射光以检测 污染物的存在或集中。 保持颗粒允许感测气体中的污染物，其中颗粒的移动可能太快以至于不能测量与渐逝场的相互作用。 波导管120，照明系统140，光电传感器150以及通信接口160均可制造在半导体管芯110上，以制造能够在空气中悬浮的自主纳米传感器 或被感测的气体。

    METHOD OF CONTROLLING NANOWIRE GROWTH AND DEVICE WITH CONTROLLED-GROWTH NANOWIRE
    4.
    发明申请
    METHOD OF CONTROLLING NANOWIRE GROWTH AND DEVICE WITH CONTROLLED-GROWTH NANOWIRE 审中-公开
    控制生长的纳米生长方法和装置

    公开(公告)号：WO2007058909A2

    公开(公告)日：2007-05-24

    申请号：PCT/US2006/043688

    申请日：2006-11-08

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. ,  WU, Wei ,  KAMINS, Theodore I, ,  SHARMA, Shashank ,  WILLIAMS, R Stanley,

    Inventor： WU, Wei ,  KAMINS, Theodore I, ,  SHARMA, Shashank ,  WILLIAMS, R Stanley,

    IPC: H01L23/532 ,  H01L21/768 ,  B82B3/00

    CPC classification number: H01L21/76879 ,  H01L21/28525 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Nanowire (260, 360) growth in situ on a planar surface, which is one of a crystalline surface having any crystal orientation, a polycrystalline surface and a non-crystalline surface, is controlled by guiding (160) catalyzed growth from the planar surface in a nano-throughhole (224, 324) of a patterned layer (220, 320) formed on the planar surface, such that the nanowire (260, 360) grows in situ perpendicular to the planar surface. An electronic device (200, 300) includes first and second regions of electronic circuitry (280, 370, 380) vertically spaced by the patterned layer (220, 320). The nano-throughhole (224, 324) of the patterned layer (220, 320) extends perpendicularly between the regions. The first region (324, 376) has the planar surface. The device (200, 300) further includes a nanowire (260, 360) extending perpendicular from a catalyst location on the planar surface of the first region (374, 376) in the nano-throughhole (224, 324). The nanowire (260, 360) forms a component of a nano-scale circuit that connects the regions.

    Abstract translation: 通过从平坦表面引导（160）催化生长来控制在平坦表面上原位生长的纳米线（260,360），其是具有任何晶体取向，多晶表面和非结晶表面的晶体表面之一， 形成在所述平面表面上的图案化层（220,320）的纳米通孔（224,324），使得所述纳米线（260,360）垂直于所述平面表面原位生长。 电子设备（200,300）包括由图案化层（220,320）垂直间隔开的电子电路（280,370,380）的第一和第二区域。 图案化层（220,320）的纳米通孔（224,324）在区域之间垂直延伸。 第一区域（324,376）具有平坦表面。 装置（200,300）还包括从纳米通孔（224,324）中的第一区域（374,386）的平坦表面上的催化剂位置垂直延伸的纳米线（260,360）。 纳米线（260,360）形成连接这些区域的纳米级电路的部件。

    ACTIVE INTERCONNECTS AND CONTROL POINTS IN INTEGRATED CIRCUITS
    5.
    发明申请
    ACTIVE INTERCONNECTS AND CONTROL POINTS IN INTEGRATED CIRCUITS 审中-公开
    集成电路中的主动互连和控制点

    公开(公告)号：WO2006115968A2

    公开(公告)日：2006-11-02

    申请号：PCT/US2006/014856

    申请日：2006-04-19

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. ,  WILLIAMS, R., Stanley ,  KUEKES, Phillip, J. ,  PERNER, Frederick, A. ,  SNIDER, Gregory, S. ,  STEWART, Duncan

    Inventor： WILLIAMS, R., Stanley ,  KUEKES, Phillip, J. ,  PERNER, Frederick, A. ,  SNIDER, Gregory, S. ,  STEWART, Duncan

    IPC: H01L21/66

    CPC classification number: H05K7/1092 ,  H01L23/5228 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In various embodiments of the present invention, tunable resistors (1102) are introduced at the interconnect layer of the integrated circuits (102) in order to provide a means for adjusting internal voltage and/or current levels within the integrated circuit to repair defective components or to configure the integrated circuit following manufacture. For example, when certain internal components, such as transistors, do not have specified electronics characteristics due to manufacturing defects, adjustment of the variable resistances of the tunable resistors (1102) included in the interconnect layer of integrated circuits according to embodiments of the present invention can be used to adjust internal voltage and/or levels in order to ameliorate the defective components. In other cases, the tunable resistors may be used as switches to configure integrated circuit components, including individual transistors and logic gates as well as larger, hierarchically structured functional modules and domains. In some cases, components and modules may be turned off, while, in other cases, components and modules may be turned on.

    Abstract translation: 在本发明的各种实施例中，可调谐电阻器（1102）被引入集成电路（102）的互连层，以便提供用于调整集成电路内的内部电压和/或电流水平以修复有缺陷的部件或 配置后续制造的集成电路。 例如，当诸如晶体管的某些内部部件由于制造缺陷而没有指定的电子特性时，根据本发明的实施例调整包括在集成电路的互连层中的可调电阻器（1102）的可变电阻 可以用于调整内部电压和/或电平，以改善有缺陷的部件。 在其他情况下，可调谐电阻器可以用作开关来配置集成电路组件，包括单独的晶体管和逻辑门以及更大的分层结构的功能模块和域。 在某些情况下，可能会关闭组件和模块，而在其他情况下，可能会打开组件和模块。

    QUANTUM INFORMATION PROCESSING USING ELECTROMAGNETICALLY INDUCED TRANSPARENCY
    7.
    发明申请
    QUANTUM INFORMATION PROCESSING USING ELECTROMAGNETICALLY INDUCED TRANSPARENCY 审中-公开
    使用电磁感应透明度的量子信息处理

    公开(公告)号：WO2004072806A3

    公开(公告)日：2006-04-20

    申请号：PCT/US2004003788

    申请日：2004-02-11

    Applicant: HEWLETT PACKARD DEVELOPMENT CO ,  BEAUSOLEIL RAYMOND G ,  KENT ADRIAN P ,  KUEKES PHILIP J ,  MUNRO WILLIAM J ,  SPILLER TIMOTHY P ,  WILLIAMS R STANLEY

    Inventor： BEAUSOLEIL RAYMOND G ,  KENT ADRIAN P ,  KUEKES PHILIP J ,  MUNRO WILLIAM J ,  SPILLER TIMOTHY P ,  WILLIAMS R STANLEY

    IPC: G06N99/00 ,  G06N1/00

    CPC classification number: B82Y10/00 ,  G06N99/002

    Abstract: Quantum information processing structures and methods use photons and four-level matter systems in electromagnetically induced transparency (EIT) arrangements for one and two-qubit quantum gates , two-photon phase shifters , and Bell state measurement devices . For efficient coupling of the matter systems to the photons while decoupling the matter systems from the phonon bath, molecular cages or molecular tethers keep atoms/molecules within the electromagnetic field of the photon, e.g., in the evanescent field surrounding the core of an optical fiber carrying the photons. To reduce decoherence caused by spontaneous emissions, the matter systems can be embedded in photonic bandgap crystals or the matter systems can be selected to include matastable energy levels.

    Abstract translation: 量子信息处理结构和方法使用光子和四级物质系统在一个和两个量子位量子门，双光子移相器和贝尔状态测量装置的电磁感应透明度（EIT）布置中。 为了将物质系统与光子有效耦合，同时将物质系统与声子浴解耦，分子笼或分子系链将原子/分子保持在光子的电磁场内，例如在光纤的核心周围的消逝场中 携带光子。 为了减少由自发辐射引起的去相干，物质系统可以嵌入光子带隙晶体中，或者可以选择物质系统以包括可侵占的能级。

    DEFECT-TOLERANT AND FAULT-TOLERANT CIRCUIT INTERCONNECTIONS
    9.
    发明申请
    DEFECT-TOLERANT AND FAULT-TOLERANT CIRCUIT INTERCONNECTIONS 审中-公开
    容错和容错电路互连

    公开(公告)号：WO2005026957A3

    公开(公告)日：2005-06-23

    申请号：PCT/US2004029333

    申请日：2004-09-08

    Applicant: HEWLETT PACKARD DEVELOPMENT CO ,  KUEKES PHILIP J ,  WILLIAMS R STANLEY ,  SEROUSSI GADIEL

    Inventor： KUEKES PHILIP J ,  WILLIAMS R STANLEY ,  SEROUSSI GADIEL

    IPC: G06F11/10 ,  G11C8/10 ,  G11C8/20 ,  G11C13/00

    CPC classification number: G06F11/1016 ,  B82Y10/00 ,  G11C8/10 ,  G11C13/0014 ,  G11C2213/77 ,  G11C2213/81

    Abstract: Methods for increasing defect tolerance and fault tolerance in systems containing interconnected components, in which a signal level is classified as belonging to one of a plurality of different, distinguishable classes based on one or more thresholds separating the signal-level classes, and defect-and-fault tolerant systems embodying the methods. An electronic-device embodiment including an array of nanowire crossbars, the nanoscale memory elements within the nanowire crossbars addressed through conventional microelectronic address lines, and a method embodiment for providing fault-tolerant interconnection interfaces with electrically distinguishable signal levels are described. In the described embodiment, in order to interconnect microelectronic address lines with the nanowire crossbars within the electronic memory, an address encoding technique is employed to generate a number of redundant, parity-check address lines to supplement a minimally required set of address signal lines needed to access the nanoscale memory elements.

    Abstract translation: 用于增加包含互连组件的系统中的缺陷容限和容错的方法，其中信号电平基于分离信号电平类别的一个或多个阈值被分类为属于多个不同的可区分类别中的一个，以及缺陷 体现这些方法的容错系统。 包括纳米线交叉杆阵列的电子设备实施例中，纳米线交叉杆内的纳米级的存储元件通过传统的微电子地址线寻址，以及用于提供容错互连接口与电可区别的信号电平的方法实施例进行说明。 在所述实施例中，为了在电子存储器内的互连与所述纳米线交叉杆微电子地址线，一个地址编码技术被利用来产生若干多余的，奇偶校验地址线来补充最低限度所需的一组的地址信号线需要 访问纳米级存储元件。

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