公开(公告)号：WO8603333A3

公开(公告)日：1986-07-17

申请号：PCT/US8502234

申请日：1985-11-11

Applicant: AMERICAN TELEPHONE & TELEGRAPH

Inventor： LEBOWITZ JOSEPH ,  LYNCH WILLIAM THOMAS

IPC: H01L27/04 ,  G11C11/34 ,  G11C11/403 ,  H01L21/225 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/94

CPC classification number: H01L27/10861 ,  H01L21/2257 ,  H01L29/945 ,  Y10S148/109

Abstract: A trench version of a high-capacitance (Hi-C) capacitor for a dynamic random-access-memory (DRAM) cell is made utilizing a doping technique. A shallow highly doped trench region is thereby formed. At the same time, selected lateral surface portions (24) of the structure are also thereby highly doped. These surface portions permit a direct electrical connection to be easily made between the capacitor and a subsequently formed adjacent access transistor.

Abstract translation: 用于动态随机存取存储器（DRAM）单元的沟槽版本的高电容（Hi-C）电容器是利用掺杂技术制造的。 由此形成浅的高度掺杂的沟槽区域。 同时，结构的选定侧面部分（24）也因此被高度掺杂。 这些表面部分允许在电容器和随后形成的相邻存取晶体管之间容易地进行直接电连接。

公开(公告)号：WO8700690A3

公开(公告)日：1987-07-30

申请号：PCT/US8601426

申请日：1986-07-08

Applicant: AMERICAN TELEPHONE & TELEGRAPH

Inventor： LYNCH WILLIAM THOMAS

IPC: G11C11/401 ,  H01L21/76 ,  H01L21/82 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L29/94

CPC classification number: H01L27/10861 ,  H01L27/10829 ,  H01L29/945

Abstract: Parallel elongated trenches (22) in a silicon substrate (11, 12) are utilized to form multiple distinct memory cell capacitors on each continuous wall (24, 26) of each trench. Chanstops (52) are formed between adjacent capacitors to achieve electrical isolation. A separate word line (64) overlies each trench wall and is connected via respective MOS transistors to the spaced-apart capacitors formed on the wall. A reliable high-density memory characterized by excellent performance is thereby realized.

公开(公告)号：WO8700690A2

公开(公告)日：1987-01-29

申请号：PCT/US8601426

申请日：1986-07-08

Applicant: AMERICAN TELEPHONE & TELEGRAPH

Inventor： LYNCH WILLIAM THOMAS

IPC: G11C11/401 ,  H01L21/76 ,  H01L21/82 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L29/94

CPC classification number: H01L27/10861 ,  H01L27/10829 ,  H01L29/945

Abstract: Parallel elongated trenches (22) in a silicon substrate (11, 12) are utilized to form multiple distinct memory cell capacitors on each continuous wall (24, 26) of each trench. Chanstops (52) are formed between adjacent capacitors to achieve electrical isolation. A separate word line (64) overlies each trench wall and is connected via respective MOS transistors to the spaced-apart capacitors formed on the wall. A reliable high-density memory characterized by excellent performance is thereby realized.

Abstract translation: 在硅衬底（11,12）中的平行延长的沟槽（22）用于在每个沟槽的每个连续壁（24,26）上形成多个不同的存储单元电容器。 在毗邻的电容器之间形成节流阀（52）以实现电气隔离。 单独的字线（64）覆盖每个沟槽壁，并且经由各个MOS晶体管连接到形成在壁上的间隔开的电容器。 从而实现了性能优异的可靠的高密度存储器。

公开(公告)号：WO8603333A2

公开(公告)日：1986-06-05

申请号：PCT/US8502234

申请日：1985-11-11

Applicant: AMERICAN TELEPHONE & TELEGRAPH

Inventor： LEBOWITZ JOSEPH ,  LYNCH WILLIAM THOMAS

IPC: H01L27/04 ,  G11C11/34 ,  G11C11/403 ,  H01L21/225 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/94

CPC classification number: H01L27/10861 ,  H01L21/2257 ,  H01L29/945 ,  Y10S148/109

Abstract: A trench version of a high-capacitance (Hi-C) capacitor for a dynamic random-access-memory (DRAM) cell is made utilizing a doping technique. A shallow highly doped trench region is thereby formed. At the same time, selected lateral surface portions (24) of the structure are also thereby highly doped. These surface portions permit a direct electrical connection to be easily made between the capacitor and a subsequently formed adjacent access transistor.