公开(公告)号：WO2010132298A3

公开(公告)日：2010-11-18

申请号：PCT/US2010/034050

申请日：2010-05-07

Applicant: APPLE INC. ,  DE CESARE, Josh, P. ,  WADHAWAN, Ruchi ,  SMITH, Michael, J. ,  KUMAR, Puneet ,  SEMERIA, Bernard, J.

Inventor： DE CESARE, Josh, P. ,  WADHAWAN, Ruchi ,  SMITH, Michael, J. ,  KUMAR, Puneet ,  SEMERIA, Bernard, J.

IPC: G06F12/00

Abstract: In an embodiment, a timer unit may be provided that may be programmed to a selected time interval, or wakeup interval. A processor may execute a wait for event instruction, and enter a low power state for the thread that includes the instruction. The timer unit may signal a timer event at the expiration of the wakeup interval, and the processor may exit the low power state in response to the timer event. The thread may continue executing with the instruction following the wait for event instruction. In an embodiment, the processor/timer unit may be used to implement a power-managed lock acquisition mechanism, in which the processor is awakened a number of times to check the lock and execute the wait for event instruction if the lock is not free, after which the thread may block until the lock is free.

公开(公告)号：WO2015187246A1

公开(公告)日：2015-12-10

申请号：PCT/US2015/024653

申请日：2015-04-07

Applicant: APPLE INC.

Inventor： SMITH, Michael, J. ,  DE CESARE, Josh, P. ,  TRIPATHI, Brijesh ,  IWAMOTO, Derek ,  KEIL, Shane, J.

IPC: G06F13/38

CPC classification number: G06F13/4226 ,  G06F13/105 ,  G06F13/28 ,  G06F13/385 ,  G06F13/4022 ,  G06F13/4059

Abstract: An interface emulator for an IC is disclosed. An interface emulator includes a first first-in, first-out memory (FIFO) and a second FIFO. The first FIFO is coupled to receive data from an access port and a second FIFO coupled to receive data from at least one functional unit in the IC. The access port may be coupled to a device that is external to the IC. The external device may write information into the first FIFO, and this information may subsequently be read by a functional unit in the IC. Similarly, the functional unit may write information into the second FIFO, with the external device subsequently reading the information. Information may be written into the FIFOs in accordance with a predefined protocol. Thus, a particular type of interface may be emulated even though the physical connection and supporting circuitry for that interface is not otherwise implemented in the IC.

Abstract translation: 公开了一种用于IC的接口仿真器。 接口仿真器包括第一先入先出存储器（FIFO）和第二FIFO。 第一FIFO被耦合以从接入端口接收数据，并且第二FIFO被耦合以从IC中的至少一个功能单元接收数据。 访问端口可以耦合到IC外部的设备。 外部设备可以将信息写入第一FIFO，并且该信息随后可以由IC中的功能单元读取。 类似地，功能单元可以将信息写入第二FIFO，随后外部设备读取信息。 可以根据预定义的协议将信息写入FIFO。 因此，即使在IC中没有实现用于该接口的物理连接和支持电路，也可以模拟特定类型的接口。