SYSTEM ON A CHIP THAT DRIVES DISPLAY WHEN CPUS ARE POWERED DOWN

    公开(公告)号:WO2022055594A1

    公开(公告)日:2022-03-17

    申请号:PCT/US2021/039213

    申请日:2021-06-25

    申请人: APPLE INC.

    摘要: In an embodiment, a system may include one or more processors forming central processing units (CPUs) in the system, a display controller configured to display frames on a display device, a memory controller configured to control a memory, and a power management circuit. The power management circuit may be configured to establish one of a plurality of power states in the system. In a first power state, the display controller and the memory controller are powered on while the CPUs are powered off. The display controller may be configured to read a plurality of prerendered frames from the memory and display the plurality of prerendered frames at times specified for each of the plurality of prerendered frames.

    COMPRESSED FRAME WRITEBACK AND READ FOR DISPLAY IN IDLE SCREEN ON CASE

    公开(公告)号:WO2014160588A9

    公开(公告)日:2014-10-02

    申请号:PCT/US2014/031343

    申请日:2014-03-20

    申请人: APPLE INC.

    IPC分类号: G06F3/14 G09G5/393 G09G5/395

    摘要: In an embodiment, a display pipe is configured to composite one or more frames of images and/or video sequences to generate output frames for display. Additionally, the display pipe may be configured to compress an output frame and write the compressed frame to memory responsive to detecting static content in the output frames is detected. The display pipe may also be configured to read the compressed frame from memory for display instead of reading the frames for compositing and display. In some embodiments, the display pipe may include an idle screen detect circuit configured to monitor the operation of the display pipe and/or the output frames to detect the static content.

    FOLLOWER MODE VIDEO OPERATION
    3.
    发明申请

    公开(公告)号:WO2022056407A1

    公开(公告)日:2022-03-17

    申请号:PCT/US2021/050112

    申请日:2021-09-13

    申请人: APPLE INC.

    IPC分类号: G09G5/12 H04N5/06

    摘要: A method may include receiving, via a processor, a frame of image data, such that the frame of image data may include an active portion and an idle portion. The active portion may include data for presenting one or more images via a first display of a first electronic device. The method may also include receiving a signal from a second electronic device during the idle portion of the frame of image data, such that the second electronic device is separate from the first display. The method may then involve initiating processing of the frame of image data in response to the signal being received from the second electronic device.

    PARAMETER FIFO
    4.
    发明申请
    PARAMETER FIFO 审中-公开
    参数FIFO

    公开(公告)号:WO2011085029A1

    公开(公告)日:2011-07-14

    申请号:PCT/US2011/020259

    申请日:2011-01-05

    IPC分类号: G09G5/36

    摘要: A graphics system may include one or more processing units for processing a current display frame, each processing unit including a plurality of parameter registers for storing parameter settings used in processing the current display frame. A parameter buffer in the graphics system may store frame packets, with each frame packet containing information corresponding to parameter settings to be used for at least one display frame. A control circuit coupled to the buffer and to the one or more processing units may retrieve and process a top frame packet from the parameter buffer to update one or more of the parameter registers according to the contents of the top frame packet. The control circuit may issue DMA requests to fill the parameter buffer with frame packets transferred from system memory, where the frame packets may be written by an application (or software) executing on a central processing unit.

    摘要翻译: 图形系统可以包括用于处理当前显示帧的一个或多个处理单元,每个处理单元包括用于存储用于处理当前显示帧的参数设置的多个参数寄存器。 图形系统中的参数缓冲器可以存储帧分组,每个帧分组包含对应于要用于至少一个显示帧的参数设置的信息。 耦合到缓冲器和一个或多个处理单元的控制电路可以从参数缓冲器检索和处理顶部帧分组,以根据顶部帧分组的内容更新一个或多个参数寄存器。 控制电路可以发出DMA请求,用从系统存储器传送的帧分组填充参数缓冲器,其中帧分组可以由在中央处理单元上执行的应用(或软件)写入。

    COMPRESSED FRAME WRITEBACK AND READ FOR DISPLAY IN IDLE SCREEN ON CASE
    5.
    发明申请
    COMPRESSED FRAME WRITEBACK AND READ FOR DISPLAY IN IDLE SCREEN ON CASE 审中-公开
    压缩框架写入和读取显示在空白屏幕上的情况

    公开(公告)号:WO2014160588A1

    公开(公告)日:2014-10-02

    申请号:PCT/US2014/031343

    申请日:2014-03-20

    申请人: APPLE INC.

    IPC分类号: G06F3/14 G09G5/393 G09G5/395

    摘要: In an embodiment, a display pipe is configured to composite one or more frames of images and/or video sequences to generate output frames for display. Additionally, the display pipe may be configured to compress an output frame and write the compressed frame to memory responsive to detecting static content in the output frames is detected. The display pipe may also be configured to read the compressed frame from memory for display instead of reading the frames for compositing and display. In some embodiments, the display pipe may include an idle screen detect circuit configured to monitor the operation of the display pipe and/or the output frames to detect the static content.

    摘要翻译: 在一个实施例中,显示管被配置为组合一个或多个图像帧和/或视频序列以产生用于显示的输出帧。 此外,显示管可以被配置为压缩输出帧并且响应于检测到输出帧中的静态内容而将压缩帧写入存储器。 显示管还可以被配置为从存储器读取压缩帧用于显示,而不是读取用于合成和显示的帧。 在一些实施例中,显示管道可以包括被配置为监视显示管道和/或输出框架的操作以检测静态内容的空闲屏幕检测电路。

    MECHANISM TO DETECT IDLE SCREEN ON
    6.
    发明申请
    MECHANISM TO DETECT IDLE SCREEN ON 审中-公开
    检测空白屏幕的机制

    公开(公告)号:WO2014160574A1

    公开(公告)日:2014-10-02

    申请号:PCT/US2014/031226

    申请日:2014-03-19

    申请人: APPLE INC.

    摘要: In an embodiment, a display pipe is configured to composite one or more frames of images and/or video sequences to generate output frames for display. Additionally, the display pipe may be configured to compress an output frame and write the compressed frame to memory responsive to detecting static content in the output frames is detected. The display pipe may also be configured to read the compressed frame from memory for display instead of reading the frames for compositing and display. In some embodiments, the display pipe may include an idle screen detect circuit configured to monitor the operation of the display pipe and/or the output frames to detect the static content.

    摘要翻译: 在一个实施例中,显示管被配置为组合一个或多个图像帧和/或视频序列以产生用于显示的输出帧。 此外,显示管可以被配置为压缩输出帧并且响应于检测到输出帧中的静态内容而将压缩帧写入存储器。 显示管还可以被配置为从存储器读取压缩帧用于显示,而不是读取用于合成和显示的帧。 在一些实施例中,显示管道可以包括被配置为监视显示管道和/或输出框架的操作以检测静态内容的空闲屏幕检测电路。

    DISPLAY PIPE ALTERNATE CACHE HINT
    7.
    发明申请
    DISPLAY PIPE ALTERNATE CACHE HINT 审中-公开
    显示管替代缓存提示

    公开(公告)号:WO2014043063A1

    公开(公告)日:2014-03-20

    申请号:PCT/US2013/058881

    申请日:2013-09-10

    申请人: APPLE INC.

    IPC分类号: G09G5/39 G09G5/00

    摘要: A system and method for efficiently allocating data in a memory hierarchy. A system includes a memory controller for controlling accesses to a memory and a display controller for processing video frame data. The memory controller includes a cache capable of storing data read from the memory. A given video frame may be processed by the display controller and presented on a respective display screen. During processing, control logic within the display controller sends multiple memory access requests to the memory controller with cache hint information. For the frame data, the cache hint information may alternate between (i) indicating to store frame data read in response to respective requests in the memory cache and (ii) indicating to not store the frame data read in response to respective requests in the memory cache.

    摘要翻译: 一种用于在存储器层级中有效分配数据的系统和方法。 系统包括用于控制对存储器的访问的存储器控​​制器和用于处理视频帧数据的显示控制器。 存储器控制器包括能够存储从存储器读取的数据的高速缓存器。 给定的视频帧可以由显示控制器处理并呈现在相应的显示屏幕上。 在处理期间,显示控制器内的控制逻辑使用高速缓存提示信息向存储器控制器发送多个存储器访问请求。 对于帧数据,缓存提示信息可以在(i)指示存储响应于存储器高速缓存中的相应请求而读取的帧数据和(ii)指示不存储响应于存储器中的各个请求而读取的帧数据的交替 缓存。

    ELECTRONIC DISPLAY COLOR ACCURACY COMPENSATION

    公开(公告)号:WO2019050616A1

    公开(公告)日:2019-03-14

    申请号:PCT/US2018/040763

    申请日:2018-07-03

    申请人: APPLE INC.

    IPC分类号: G09G5/02 G09G5/06

    摘要: Systems, methods, and non-transitory media are presented that provide for improving color accuracy. An electronic display (12) includes a display region having multiple pixels each having multiple subpixels. The electronic device (10) also includes a display pipeline (36) coupled to the electronic display (12). The display pipeline (36) is configured to receive image data and perform white point compensation on the image data to compensate for a current drop in the display (12) to cause the display (12) to display a target white point when displaying white. The display pipeline (36) also is configured to correct white point overcompensation on the image data to reduce possible oversaturation of non-white pixels using the white point compensation. Finally, the display pipeline (36) is configured to output the compensated and corrected image data to the electronic display (12) to facilitate displaying the compensated and corrected image data on the display region.

    MID-FRAME BLANKING
    9.
    发明申请
    MID-FRAME BLANKING 审中-公开
    中框布局

    公开(公告)号:WO2015187329A1

    公开(公告)日:2015-12-10

    申请号:PCT/US2015/030731

    申请日:2015-05-14

    申请人: APPLE INC.

    IPC分类号: G06F3/041

    摘要: Systems, apparatuses, and methods for performing mid-frame blanking. A first portion of a frame is driven to a display and then a first mid-frame blanking interval is generated. Following this first mid-frame blanking interval, a second portion of the frame is driven to the display, followed by a second mid-frame blanking interval, followed by a third portion of the frame, and so on. Any number of mid-frame blanking intervals may be introduced in a given frame. During each mid-frame blanking interval, touch sensing is performed to detect touch events on the screen for in-cell touch type displays. For displays with touch sensors electrically separated from the display common voltage layer, special sense scan steps are performed during mid-frame blanking intervals. By performing touch sensing or special sense scan steps during a frame rather than only at the end of a frame, the performance of touch sensing is improved.

    摘要翻译: 执行中帧消隐的系统,设备和方法。 帧的第一部分被驱动到显示器,然后产生第一中间帧消隐间隔。 在该第一中间帧消隐间隔之后,帧的第二部分被驱动到显示器,随后是第二中间帧消隐间隔,随后是帧的第三部分,等等。 可以在给定的帧中引入任何数量的中帧消隐间隔。 在每个中间帧消隐间隔期间,执行触摸感测以检测用于小区内触摸式显示的屏幕上的触摸事件。 对于具有与显示器公共电压层电气分离的触摸传感器的显示器,在中帧消隐间隔期间执行特殊感测扫描步骤。 通过在帧期间执行触摸感测或特殊感测扫描步骤,而不仅仅是在帧的结尾处,提高了触摸感测的性能。

    VIDEO DATA COMPRESSION FORMAT
    10.
    发明申请
    VIDEO DATA COMPRESSION FORMAT 审中-公开
    视频数据压缩格式

    公开(公告)号:WO2015020773A1

    公开(公告)日:2015-02-12

    申请号:PCT/US2014/047027

    申请日:2014-07-17

    申请人: APPLE INC.

    IPC分类号: G06T9/00

    摘要: A method and device for data compression are presented, in which a data processor may receive a packet of image data which includes four groups of N bits, where N is an integer greater than 2. The data processor may compress the received packet of data, such that a total number of bits for the converted packet is less than four times N. The data processor may compress the received packet of image data by reducing the resolution of three of the values while maintaining the resolution of the fourth value. To reduce the resolution of the three values, the data processor may apply a dithering formula to the values. The data processor may then send the converted packet via an interface.

    摘要翻译: 提出了一种用于数据压缩的方法和装置,其中数据处理器可以接收包括四个N位组的图像数据分组,其中N是大于2的整数。数据处理器可以压缩所接收的数据分组, 使得转换的分组的总比特数小于N倍。数据处理器可以通过在保持第四值的分辨率的同时降低三个值的分辨率来压缩接收的图像数据分组。 为了降低三个值的分辨率,数据处理器可以对该值应用抖动公式。 然后,数据处理器可以经由接口发送转换的分组。