ADDING METADATA TO TEXTURE SURFACES FOR BANDWIDTH COMPRESSION

    公开(公告)号:WO2019055918A1

    公开(公告)日:2019-03-21

    申请号:PCT/US2018/051339

    申请日:2018-09-17

    IPC分类号: G06T9/00

    摘要: A method for memory bandwidth compression comprising analyzing a texture surface to identify one or more areas of the texture surface that are fetchable with lower memory bandwidth consumption as compared to other areas of the texture surface, adding metadata to a metadata surface associated with the texture surface based on the analysis, the metadata indicating the one or more areas of the texture surface that are fetchable with lower memory bandwidth consumption as compared to other areas of the texture surface, and fetching the texture surface in accordance with the metadata.

    GENERAL PURPOSE INPUT/OUTPUT DATA CAPTURE AND NEURAL CACHE SYSTEM FOR AUTONOMOUS MACHINES
    2.
    发明申请
    GENERAL PURPOSE INPUT/OUTPUT DATA CAPTURE AND NEURAL CACHE SYSTEM FOR AUTONOMOUS MACHINES 审中-公开
    通用输入/输出数据采集和自动机器的神经缓存系统

    公开(公告)号:WO2018064794A1

    公开(公告)日:2018-04-12

    申请号:PCT/CN2016/101427

    申请日:2016-10-05

    IPC分类号: G06F17/00

    摘要: A mechanism is described for facilitating general purpose input/output data capture and neural cache system for autonomous machines. A method of embodiments, as described herein, includes capturing, by an image capturing device, one or more images of one or more objects, where the one or more images represent input data associated with a neural network. The method may further include determining accuracy of first output results generated by a default neural caching system by comparing the first output results with second output results predicted by a custom neural caching system. The method may further include outputting, based on the accuracy, a final output results including at least one of the first output results or the second output results.

    摘要翻译: 描述了用于促进通用输入/输出数据捕获和自主机器的神经缓存系统的机制。 如本文所述的实施例的方法包括由图像捕捉设备捕捉一个或多个对象的一个​​或多个图像,其中一个或多个图像表示与神经网络相关联的输入数据。 该方法还可以包括通过将第一输出结果与由定制神经高速缓存系统预测的第二输出结果进行比较来确定由默认神经高速缓存系统生成的第一输出结果的准确度。 该方法可以进一步包括基于精度输出包括第一输出结果或第二输出结果中的至少一个的最终输出结果。

    DISPLAY PIPE ALTERNATE CACHE HINT
    4.
    发明申请
    DISPLAY PIPE ALTERNATE CACHE HINT 审中-公开
    显示管替代缓存提示

    公开(公告)号:WO2014043063A1

    公开(公告)日:2014-03-20

    申请号:PCT/US2013/058881

    申请日:2013-09-10

    申请人: APPLE INC.

    IPC分类号: G09G5/39 G09G5/00

    摘要: A system and method for efficiently allocating data in a memory hierarchy. A system includes a memory controller for controlling accesses to a memory and a display controller for processing video frame data. The memory controller includes a cache capable of storing data read from the memory. A given video frame may be processed by the display controller and presented on a respective display screen. During processing, control logic within the display controller sends multiple memory access requests to the memory controller with cache hint information. For the frame data, the cache hint information may alternate between (i) indicating to store frame data read in response to respective requests in the memory cache and (ii) indicating to not store the frame data read in response to respective requests in the memory cache.

    摘要翻译: 一种用于在存储器层级中有效分配数据的系统和方法。 系统包括用于控制对存储器的访问的存储器控​​制器和用于处理视频帧数据的显示控制器。 存储器控制器包括能够存储从存储器读取的数据的高速缓存器。 给定的视频帧可以由显示控制器处理并呈现在相应的显示屏幕上。 在处理期间,显示控制器内的控制逻辑使用高速缓存提示信息向存储器控制器发送多个存储器访问请求。 对于帧数据,缓存提示信息可以在(i)指示存储响应于存储器高速缓存中的相应请求而读取的帧数据和(ii)指示不存储响应于存储器中的各个请求而读取的帧数据的交替 缓存。

    ACCELERATED TEXTURE LOOKUPS USING TEXTURE COORDINATE DERIVATIVES
    5.
    发明申请
    ACCELERATED TEXTURE LOOKUPS USING TEXTURE COORDINATE DERIVATIVES 审中-公开
    使用纹理协调衍生物的加速纹理眼镜

    公开(公告)号:WO2013039913A1

    公开(公告)日:2013-03-21

    申请号:PCT/US2012/054662

    申请日:2012-09-11

    发明人: OSMAN, Steven

    IPC分类号: G06T17/00 G06T1/00

    摘要: Methods, systems, and devices are disclosed for preparing to prefetch memory in 3D graphical shader programs. Based on the memory addresses of texels from a texture map that were previously read, a memory address of a to-be-read texel is estimated by using a first-order derivative of the memory address with respect to pixel distance. The estimated memory address is then prefetched for use when the pixel corresponding to the texel is rendered. Whether or not to perform the estimation of the texel memory address can be determined by whether the corresponding pixels are on the same, flat facet on a 3D model. Multiple directions on the facet can be used for memory address estimation as well as higher-order derivatives.

    摘要翻译: 公开了用于准备在3D图形着色器程序中预取存储器的方法,系统和设备。 基于来自先前读取的纹理映射的纹素的存储器地址,通过使用相对于像素距离的存储器地址的一阶导数来估计要被读取的纹素的存储器地址。 然后,当渲染与纹素相对应的像素时,预估存储器地址用于使用。 是否执行纹理存储器地址的估计可以通过对应的像素是否在3D模型上的相同的平坦面上来确定。 方面上的多个方向可用于存储器地址估计以及高阶导数。

    LATENCY AND BANDWIDTH EFFICIENCY IMPROVEMENT FOR READ MODIFY WRITE WHEN A READ OPERATION IS REQUESTED TO A PARTIALLY MODIFIED WRITE ONLY CACHELINE
    6.
    发明申请
    LATENCY AND BANDWIDTH EFFICIENCY IMPROVEMENT FOR READ MODIFY WRITE WHEN A READ OPERATION IS REQUESTED TO A PARTIALLY MODIFIED WRITE ONLY CACHELINE 审中-公开
    读取操作请求读取修改写入的部分修改写入唯一的数据库时延迟和带宽效率改进

    公开(公告)号:WO2018071121A1

    公开(公告)日:2018-04-19

    申请号:PCT/US2017/051034

    申请日:2017-09-12

    申请人: INTEL CORPORATION

    IPC分类号: G06F12/0811

    摘要: Methods and apparatus relating to techniques to improve/optimize latency and bandwidth efficiency for read modify write operations when a read operation is requested to a partially modified write only cacheline are described. In an embodiment, a first cache stores data from one or more cachelines of a second cache in response to a read hit write only operation (e.g., instead of sending the data to main memory). Write accumulate logic merges the stored data with one or more write operations. Other embodiments are also disclosed and claimed.

    摘要翻译: 描述了当向读取操作被请求到部分修改的只写高速缓存行时,用于改进/优化读取修改写入操作的等待时间和带宽效率的技术的方法和设备。 在一个实施例中,响应于读命中只写操作(例如,而不是将数据发送到主存储器),第一高速缓存存储来自第二高速缓存的一个或多个高速缓存行的数据。 写入累积逻辑将存储的数据与一个或多个写入操作合并。 其他实施例也被公开和要求保护。

    SYSTEMS AND METHODS FOR DYNAMIC DATA STORAGE
    8.
    发明申请
    SYSTEMS AND METHODS FOR DYNAMIC DATA STORAGE 审中-公开
    动态数据存储的系统和方法

    公开(公告)号:WO2014067440A1

    公开(公告)日:2014-05-08

    申请号:PCT/CN2013/086103

    申请日:2013-10-29

    发明人: JIN, Jiesheng

    IPC分类号: G06F9/45

    CPC分类号: G06F12/126 G06F2212/455

    摘要: A data caching method is performed to receive an instruction to operate based on a specific data set; determine whether the specific data set is cached in its memory; when the specific data set is not cached in the memory, determine a plurality of attributes for a plurality of data sets currently stored in the memory, determine whether these attributes satisfy data caching criteria for storing the specific data set, and furthermore, when the data caching criteria are not satisfied, select at least one of the plurality of data sets according to a data replacement rule, delete at least a portion of the selected data set from the memory, and download the specific data set from a remote source; operate the specific data set according to the user instruction; and store at least a portion of the specific data set in the memory.

    摘要翻译: 执行数据缓存方法以接收基于特定数据集进行操作的指令; 确定特定数据集是否缓存在其内存中; 当特定数据集不被缓存在存储器中时,确定当前存储在存储器中的多个数据集的多个属性,确定这些属性是否满足用于存储特定数据集的数据缓存标准,此外,当数据 缓存标准不满足,根据数据替换规则选择多个数据组中的至少一个,从存储器中删除所选数据集的至少一部分,并从远程源下载特定数据集; 根据用户指令操作具体数据集; 并将特定数据集的至少一部分存储在存储器中。

    FAST, DYNAMIC CACHE PACKING
    9.
    发明申请
    FAST, DYNAMIC CACHE PACKING 审中-公开
    快速,动态缓存包装

    公开(公告)号:WO2014047050A1

    公开(公告)日:2014-03-27

    申请号:PCT/US2013/060126

    申请日:2013-09-17

    申请人: GOOGLE INC.

    IPC分类号: G06F12/04 G06T1/60

    摘要: A method for storing information may include determining whether a received data object fits inside a particular one of a plurality of free blocks in a memory bitmap. Each of the plurality of free blocks may include a column of the memory bitmap with a top margin, a bottom margin, and a predetermined width. If the received data object fits, the received data object may be stored in the particular one of the plurality of free blocks, starting at the top margin of the particular one of the plurality of free blocks. The particular one of the plurality of data blocks may be resized by moving the top margin to start below the stored received data object. The determining may include, for each of the plurality of free blocks, a height of the received data object may be compared with a height of each of the free data blocks.

    摘要翻译: 用于存储信息的方法可以包括确定接收的数据对象是否适合存储器位图中的多个空闲块中的特定一个。 多个空闲块中的每一个可以包括具有顶边距,底边距和预定宽度的存储位图的列。 如果接收的数据对象适合,则从多个空闲块的特定一个的顶部边缘开始,接收的数据对象可以存储在多个空闲块中的特定的一个中。 多个数据块中的特定一个可以通过移动顶部余量来重新调整大小,从而开始于存储的接收数据对象之下。 对于多个空闲块中的每一个,确定可以包括将接收到的数据对象的高度与每个空闲数据块的高度进行比较。

    CACHE SYSTEM AND METHOD FOR GENERATING UNCACHED OBJECTS FROM CACHED AND STORED OBJECT COMPONENTS
    10.
    发明申请
    CACHE SYSTEM AND METHOD FOR GENERATING UNCACHED OBJECTS FROM CACHED AND STORED OBJECT COMPONENTS 审中-公开
    用于从缓存和存储的对象组件生成未处理对象的高速缓存系统和方法

    公开(公告)号:WO0215011A3

    公开(公告)日:2002-09-26

    申请号:PCT/US0141608

    申请日:2001-08-08

    申请人: AWARE INC

    摘要: Methods and apparatus for constructing objects within a cache system thereby allowing the cache system to respond to requested objects that are not initially available within the cache system. One embodiment of the invention caches image files, where the images are divided into components and stored in a format that allows identification and access to the components. The cache system determines that an object, such as an image file, is missing from the cache memory, locates sufficient components from the cache memory and/or external storage, and constructs the object from the located components.

    摘要翻译: 用于在高速缓存系统内构造对象的方法和设备,从而允许高速缓存系统响应高速缓存系统内最初不可用的请求对象。 本发明的一个实施例缓存图像文件,其中图像被分成组件并以允许识别和访问组件的格式存储。 高速缓存系统确定从高速缓存存储器中缺少诸如图像文件之类的对象,从高速缓存存储器和/或外部存储器中找到足够的组件,并从所定位的组件构建该对象。