公开(公告)号：WO2014134650A3

公开(公告)日：2014-10-30

申请号：PCT/AT2014050052

申请日：2014-03-05

Applicant: AUSTRIA TECH & SYSTEM TECH

Inventor： KASPER ALEXANDER ,  DROFENIK DIETMAR ,  SHIVARUDRAPPA RAVI HANYAL ,  GÖSSLER MICHAEL

IPC: H05K1/02 ,  H01L27/13 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36 ,  H05K3/46

CPC classification number: H05K1/0298 ,  H05K1/028 ,  H05K1/09 ,  H05K1/115 ,  H05K1/162 ,  H05K3/0047 ,  H05K3/10 ,  H05K3/429 ,  H05K3/4611 ,  H05K3/4682 ,  H05K3/4691 ,  H05K3/4694 ,  H05K2201/0355 ,  H05K2201/096 ,  H05K2203/061 ,  H05K2203/063

Abstract: A method for producing a printed circuit board (13, 15, 16) with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (1, 1') and application of a dielectric insulating foil (3, 3') to at least one subarea of the conducting foil; b) applying a structure of conducting paths (4, 4') to the insulating layer (3, 3'); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (1, 1') plus insulating layer (3, 3') and conducting paths (4, 4') by interposing a prepreg layer (5, 85; 18, 18'), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method.

Abstract translation: 一种用于制造具有多层子区域的印刷电路板（13,15,16）的方法，其特征在于以下步骤：a）提供至少一个导电箔（1,1'）和施加绝缘箔（3） ，3'）到导电箔的至少一个子区域; b）将导电路径（4,4'）的结构施加到绝缘层（3,3'）; c）提供一个另外的印刷电路板结构; d）通过插入预浸料层（5,85; 18'）将另外的印刷电路板结构与导电箔（1,1'）加绝缘层（3,3'）和导电路径（4,4'）的接合， 18'），和e）在加压和加热下层压在步骤d）中连接的部分; 以及根据该方法制造的印刷电路板。