FREQUENCY MEASUREMENT FOCAL PLANE ARRAY INPUT CIRCUIT
    1.
    发明申请
    FREQUENCY MEASUREMENT FOCAL PLANE ARRAY INPUT CIRCUIT 审中-公开
    频率测量FOCAL PLANE ARRAY INPUT CIRCUIT

    公开(公告)号:WO2017019298A1

    公开(公告)日:2017-02-02

    申请号:PCT/US2016/041971

    申请日:2016-07-13

    CPC classification number: G01S7/497 G01S17/105 G01S17/89

    Abstract: The invention measures the frequency of a heterodyne laser radar (LADAR) system signal in the input cell of a focal, plane array (FPA). Embodiments amplify the return signal, and drive it into a counter for a fixed period of time. The frequency is the number of counts divided by the count time. An example design amplifier amplifies the return of a single photon response of an avalanche photodiode with a gain of 100 into a digital signal level at a 200 MHz rate with only 84 µW, demonstrating the feasibility of the approach.

    Abstract translation: 本发明测量焦平面阵列(FPA)的输入单元中的外差激光雷达(LADAR)系统信号的频率。 实施例放大返回信号,并将其驱动到计数器一段固定的时间。 频率是计数次数除以计数时间。 一个示例设计放大器将具有100增益的雪崩光电二极管的单个光子响应的返回放大到200MHz速率的数字信号电平,仅具有84μW,表明该方法的可行性。

    SIMULTANEOUS MULTIPLE WELL SIZE INTEGRATION
    2.
    发明申请

    公开(公告)号:WO2019017908A1

    公开(公告)日:2019-01-24

    申请号:PCT/US2017/042588

    申请日:2017-07-18

    Abstract: An integration circuit having multiple wells that allow for the simultaneous storage of charge during an integration interval and techniques for using the same provide benefits in dynamic range that enhance the performance of pixels. The circuit and techniques described herein could also be used in many different infrared focal plane array applications where higher dynamic range is desired and multiple gain state outputs are allowed.

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