公开(公告)号：WO2020236284A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024262

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： ALVERSON, Robert L. ,  KUNDU, Partha ,  ROWETH, Duncan ,  HEWSON, David Charles ,  CHENG, Albert

IPC: H04L12/805 ,  H04L12/801 ,  H04L12/861 ,  G06F3/06

Abstract: A network interface controller (NIC) capable of efficient packet forwarding is provided. The NIC can be equipped with a host interface, a packet generation logic block, and a forwarding logic block. During operation, the packet generation logic block can obtain, via the host interface, a message from the host device and for a remote device. The packet generation logic block may generate a plurality of packets for the remote device from the message. The forwarding logic block can then send a first subset of packets of the plurality of packets based on ordered delivery. If a first condition is met, the forwarding logic block can send a second subset of packets of the plurality of packets based on unordered delivery. Furthermore, if a second condition is met, the forwarding logic block can send a third subset of packets of the plurality of packets based on ordered delivery.

公开(公告)号：WO2020236295A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024311

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： KUNDU, Partha ,  KOPSER, Andrew S. ,  ROWETH, Duncan ,  ALVERSON, Robert L.

IPC: G06F13/38 ,  G06F9/54 ,  G06F13/16 ,  G06F13/40

Abstract: A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.

公开(公告)号：WO2020236296A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024321

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： BATAINEH, Abdulla M. ,  COURT, Thomas L. ,  CHANG, Vincent ,  HEWSON, David Charles ,  KUNDU, Partha ,  LUNDBERG, Eric P.

IPC: H04L12/933 ,  H04L12/937 ,  H04L12/863 ,  H04L12/865 ,  H04L12/883 ,  H04L12/861

Abstract: A network interface controller (NIC) capable of efficient packet injection into an output buffer is provided. The NIC can be equipped with an output buffer, a plurality of injectors, a prioritization logic block, and a selection logic block. The plurality of injectors can share the output buffer. The prioritization logic block can determine a priority associated with a respective injector based on a high watermark and a low watermark associated with the injector. The selection logic block can then determine, from the plurality of injectors, a subset of injectors associated with a buffer class and determine whether the subset of injectors includes a high- priority injector. Upon identifying a high-priority injector in the subset of injectors, the selection logic block can select the high-priority injector for injecting a packet in the output buffer.

公开(公告)号：WO2020236268A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024241

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： KUNDU, Partha ,  ALVERSON, Robert L. ,  ROWETH, Duncan

IPC: H04L12/863 ,  H04L12/861 ,  G06F15/173

Abstract: One embodiment provides a network interface controller (NIC). The NIC can include a storage device, a network interface, a hardware list-processing engine (LPE), and a message state table (MST) logic block. The storage device can store an MST. The network interface can couple the NIC to a network. The LPE can perform message matching on a first packet of a message received via the network interface. The MST logic block can store results of the message matching in the MST and receive a request to read the results of the message matching from the MST if the NIC receives a second packet associated with the message.

公开(公告)号：WO2020236291A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024272

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： HEWSON, David Charles ,  KUNDU, Partha

IPC: H04L12/863 ,  H04L12/851 ,  H04L12/931 ,  H04L12/861 ,  G06F13/10

Abstract: A network interface controller (NIC) capable of efficient load balancing among the hardware engines is provided. The NIC can be equipped with a plurality of ordering control units (OCUs), a queue, a selection logic block, and an allocation logic block. The selection logic block can determine, from the plurality of OCUs, an OCU for a command from the queue, which can store one or more commands. The allocation logic block can then determine a selection setting for the OCU, select an egress queue for the command based on the selection setting, and send the command to the egress queue.

公开(公告)号：WO2020236269A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024242

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： KUNDU, Partha ,  HEWSON, David Charles

IPC: H04L12/931 ,  H04L12/861 ,  H04L12/935

Abstract: A network interface controller (NIC) capable of efficiently utilizing an output buffer is provided. The NIC can be equipped with an output buffer, a host interface, an injector logic block, and an allocation logic block. The output buffer can include a plurality of cells, each of which can be a unit of storage in the output buffer. If the host interface receives a command from a host device, the injector logic block can generate a packet based on the command. The allocation logic block can then determine whether the packet is a multi-cell packet. If the packet is a multi-cell packet, the allocation logic block can determine a virtual index for the packet. The allocation logic block can then store, in an entry in a data structure, the virtual index, and a set of physical indices of cells storing the packet.