公开(公告)号：WO2020236288A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024269

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： ALVERSON, Robert L. ,  KOPSER, Andrew S.

IPC: H04L12/931 ,  H04L12/933 ,  H04L12/911 ,  H04L12/861

Abstract: A switch capable of on-the-fly reduction in a network is provided. The switch is equipped with a reduction engine that can be dynamically configured to perform on-the-fly reduction. As a result, the network can facilitate an efficient and scalable environment for high performance computing.

公开(公告)号：WO2020236295A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024311

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： KUNDU, Partha ,  KOPSER, Andrew S. ,  ROWETH, Duncan ,  ALVERSON, Robert L.

IPC: G06F13/38 ,  G06F9/54 ,  G06F13/16 ,  G06F13/40

Abstract: A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.

公开(公告)号：WO2020236300A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024339

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： KOPSER, Andrew S. ,  BATAINEH, Abdulla M.

IPC: H04L12/937 ,  H04L12/947 ,  H04L12/851 ,  H04L12/801

Abstract: Methods and systems are provided to facilitate network ingress fairness between applications. At an ingress port of a network, the applications providing data communications are reviewed so that and arbitration process can be used to fairly allocate bandwidth at that ingress port. In a typical process, the bandwidth is allocated based upon the number of flow channels, irrespective of the source and characteristics of those flow channels. At the ingress port, an examination of the application providing the data communication will allow for a more appropriate allocation of input bandwidth.

公开(公告)号：WO2020236259A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024129

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： ROWETH, Duncan ,  FROESE, Edwin L. ,  KOPNICK, Joseph G. ,  KOPSER, Andrew S. ,  ALVERSON, Robert

IPC: H04L12/937 ,  H04L12/935 ,  H04L12/803 ,  H04L12/721 ,  H04L12/26

Abstract: Systems and methods are provided for passing data amongst a plurality of switches having a plurality of links attached between the plurality of switches. At a switch, a plurality of load signals are received from a plurality of neighboring switches. Each of the plurality of load signals are made up of a set of values indicative of a load at each of the plurality of neighboring switches providing the load signal. Each value within the set of values provides an indication for each link of the plurality of links attached thereto as to whether the link is busy or quiet. Based upon the plurality of load signals, an output link for routing a received packet is selected, and the received packet is routed via the selected output link.

公开(公告)号：WO2020236258A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024125

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： ROWETH, Duncan ,  KOPNICK, Joseph G. ,  KOPSER, Andrew S. ,  FROESE, Edwin L.

IPC: H04L12/947 ,  H04L12/933 ,  H04L12/24 ,  H04L12/715 ,  H04L12/741

Abstract: Systems and methods are provided for performing routing in a switch network or fabric. Switches can be configured in a hierarchical topology having a plurality of groups, where switches in a group are connected to one another, and groups are connected to other groups. Routing can be performed by maintaining per-group group load information. A packet can be routed between at least two groups using the per-group group load information to effect a set of routing decisions. The set of routing decisions can be biased towards or away one or more paths.

公开(公告)号：WO2020236286A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024267

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： ALVERSON, Robert L. ,  BATAINEH, Abdulla M. ,  BEECROFT, Jonathan P. ,  COURT, Thomas L. ,  FORD, Anthony M. ,  FROESE, Edwin L. ,  HEWSON, David Charles ,  KOPNICK, Joseph G. ,  KOPSER, Andrew S. ,  ROWETH, Duncan ,  FAANES, Gregory J. ,  HIGGINS, Michael F. ,  JOHNSON, Timothy J. ,  JONES, Trevor A. ,  REINHARD, Walter James ,  SCOTT, Steven L. ,  TURNER, Edward J.

IPC: H04L12/933 ,  H04L12/935 ,  H04L12/815 ,  H04L12/851 ,  H04L12/801

Abstract: A switch architecture for a data-driven intelligent networking system is provided. The system can accommodate dynamic traffic with fast, effective congestion control. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform flow control on a per-flow basis.

公开(公告)号：WO2020236280A1

公开(公告)日：2020-11-26

申请号：PCT/US2020/024257

申请日：2020-03-23

Applicant: CRAY INC.

Inventor： ROWETH, Duncan ,  KOPSER, Andrew S. ,  KANDALLA, Krishna ,  KAPLAN, Laurence S. ,  GORODETSKY, Igor

IPC: G06F13/10 ,  G06F13/28 ,  H04L12/861

Abstract: A network interface controller (NIC) capable of efficient operation management for host accelerators is provided. The NIC can be equipped with a host interface and triggering logic block. During operation, the host interface can couple the NIC to a host device. The triggering logic block can obtain, via the host interface from the host device, an operation associated with an accelerator of the host device. The triggering logic block can determine whether a triggering condition has been satisfied for the operation based on an indicator received from the accelerator. If the triggering condition has been satisfied, the triggering logic block can obtain a piece of data generated from the accelerator from a memory location and execute the operation using the piece of data.