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    SYSTEMS AND METHODS FOR TERMINATION IN SILICON CARBIDE CHARGE BALANCE POWER DEVICES
    1.
    发明申请
    SYSTEMS AND METHODS FOR TERMINATION IN SILICON CARBIDE CHARGE BALANCE POWER DEVICES 审中-公开

    公开(公告)号：WO2020132606A1

    公开(公告)日：2020-06-25

    申请号：PCT/US2019/068110

    申请日：2019-12-20

    申请人： GENERAL ELECTRIC COMPANY

    发明人： ARTHUR, Stephen Daley ,  GHANDI, Reza ,  BOLOTNIKOV, Alexander Viktorovich ,  LILIENFELD, David Alan ,  LOSEE, Peter Almern

    IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L29/10 ,  H01L21/265

    摘要： A silicon carbide (SiC) charge balance (CB) device (4) includes a CB layer (18A), which includes a first epitaxial (epi) layer (14A). An active area (6) of the first epi layer includes a first doping concentration of a first conductivity type and a first plurality of CB regions (34) of a second conductivity type. A termination area (10) of the first epi layer includes a minimized epi doping concentration of the first conductivity type. The SiC-CB device also includes a device layer (16), which includes a second epi layer (14Z) disposed on the CB layer. An active area (6) of the second epi layer includes the first doping concentration of the first conductivity type. A termination area (10) of the device layer (16) includes the minimized epi doping concentration of the first conductivity type and a first plurality of floating regions (68) of the second conductivity type that form a junction termination (12Z) of the device.

    SYSTEMS AND METHODS FOR INTEGRATED DIODE FIELD-EFFECT TRANSISTOR SEMICONDUCTOR DEVICES
    2.
    发明申请
    SYSTEMS AND METHODS FOR INTEGRATED DIODE FIELD-EFFECT TRANSISTOR SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：WO2020139968A1

    公开(公告)日：2020-07-02

    申请号：PCT/US2019/068607

    申请日：2019-12-26

    申请人： GENERAL ELECTRIC COMPANY

    发明人： LOSEE, Peter, Almern ,  GHANDI, Reza ,  BOLOTNIKOV, Alexander Viktorovich

    IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/45 ,  H01L29/872 ,  H01L29/47

    摘要： A silicon carbide (SiC) semiconductor device may include a CB layer defined in a first epitaxial (epi) layer having a first conductivity type. The CB layer may include a plurality of CB regions having a second conductivity type. The SiC semiconductor device may further include a device epi layer having the first conductivity type disposed on the CB layer. The device epi layer may include a plurality of regions having the second conductivity type. Additionally, the SiC semiconductor device may include an ohmic contact disposed on the device epi layer and a rectifying contact disposed on the device epi layer. A field-effect transistor (FET) of the device may include the ohmic contact, and a diode of the device may include the rectifying contact, where the diode and the FET are integrated in the device.

    EDGE TERMINATION DESIGNS FOR SILICON CARBIDE SUPER-JUNCTION POWER DEVICES
    3.
    发明申请
    EDGE TERMINATION DESIGNS FOR SILICON CARBIDE SUPER-JUNCTION POWER DEVICES 审中-公开
    碳化硅超级结功率器件的边缘终端设计

    公开(公告)号：WO2017105414A1

    公开(公告)日：2017-06-22

    申请号：PCT/US2015/065881

    申请日：2015-12-15

    申请人： GENERAL ELECTRIC COMPANY

    发明人： BOLOTNIKOV, Alexander Viktorovich ,  LOSEE, Peter Almern ,  LILIENFELD, David Alan ,  MCMAHON, James Jay

    IPC分类号： H01L29/872 ,  H01L21/329 ,  H01L29/06 ,  H01L29/16 ,  H01L29/36 ,  H01L29/167

    CPC分类号： H01L29/872 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/1608 ,  H01L29/167 ,  H01L29/36 ,  H01L29/6603

    摘要： The subject matter disclosed herein relates to silicon carbide (SiC) power devices and, more specifically, to SiC super-junction (SJ) power devices. A SiC-SJ device includes a plurality of SiC semiconductor layers of a first conductivity-type, wherein a first and a second SiC semiconductor layer of the plurality of SiC semiconductor layers comprise a termination region disposed adjacent to an active region with an interface formed therebetween, wherein the termination region of the first and the second SiC semiconductor layers comprises a plurality of implanted regions of a second conductivity-type, and wherein an effective doping profile of the termination region of the first SiC semiconductor layer is different from an effective doping profile of the termination region of the second SiC semiconductor layer.

    摘要翻译： 本文公开的主题涉及碳化硅（SiC）功率器件，并且更具体地涉及SiC超结（SJ）功率器件。 SiC-SJ器件包括多个第一导电类型的SiC半导体层，其中所述多个SiC半导体层中的第一和第二SiC半导体层包括邻近有源区设置的终端区，其间形成界面 其中，第一和第二SiC半导体层的终端区域包括多个第二导电类型的注入区域，并且其中第一SiC半导体层的终端区域的有效掺杂分布不同于有效掺杂分布 第二SiC半导体层的终止区域。