APPARATUS AND METHOD FOR REGULATING A SUPPLY VOLTAGE

    公开(公告)号:WO2019045698A1

    公开(公告)日:2019-03-07

    申请号:PCT/US2017/049239

    申请日:2017-08-30

    Abstract: An apparatus for regulating a supply voltage supplied from a voltage source to a load via a supply line is provided. The apparatus includes a control circuit configured to generate a control signal based on a difference between a value of the supply voltage and a nominal value of the supply voltage. Further, the apparatus includes a switch circuit configured to couple a charged capacitive element to the supply line based on the control signal.

    CALIBRATION OF DYNAMIC ERROR IN HIGH RESOLUTION DIGITAL-TO-TIME CONVERTERS
    2.
    发明申请
    CALIBRATION OF DYNAMIC ERROR IN HIGH RESOLUTION DIGITAL-TO-TIME CONVERTERS 审中-公开
    高分辨率数字时间转换器中的动态误差校准

    公开(公告)号:WO2017052876A1

    公开(公告)日:2017-03-30

    申请号:PCT/US2016/047982

    申请日:2016-08-22

    Abstract: A calibration system operates to calibrate or correct a digital-to-time converter (DTC) that comprises a detector component and a distortion correction component. The DTC can receive one or more signals and a digital code to generate a modulation signal by controlling an offset of the one or more signals based on the digital code. The detector component can comprise a TDC or another DTC that operates to measure a dynamic behavior in response to detecting nonlinearities of the modulation signal. The distortion correction component can generate a set of distortion data that removes the dynamic behavior from an output of the DTC based on the measurement.

    Abstract translation: 校准系统用于校准或校正包括检测器部件和失真校正部件的数字 - 时间转换器(DTC)。 DTC可以通过基于数字代码控制一个或多个信号的偏移来接收一个或多个信号和数字代码以产生调制信号。 检测器部件可以包括TDC或另一个DTC,其操作以响应于检测到调制信号的非线性来测量动态特性。 失真校正组件可以生成一组基于测量从DTC的输出消除动态特性的失真数据。

    APPARATUS AND METHOD FOR INTERPOLATING BETWEEN A FIRST SIGNAL AND A SECOND SIGNAL

    公开(公告)号:WO2019117932A1

    公开(公告)日:2019-06-20

    申请号:PCT/US2017/066555

    申请日:2017-12-15

    Abstract: An apparatus for interpolating between a first signal and a second signal is provided. The apparatus includes a first plurality of interpolation cells configured to generate a first interpolation signal at a first node. At least one of the first plurality of interpolation cells is configured to supply, based on a first number of bits of a control word, at least one of the first signal and the second signal to the first node. The apparatus further includes a second plurality of interpolation cells configured to generate a second interpolation signal at a second node. At least one of the second plurality of interpolation cells is configured to supply, based on a second number of bits of the control word, at least one of the first signal and the second signal to the second node. The apparatus additionally includes an interpolation circuit configured to weight the second interpolation signal based on a weighting factor, and to combine the first interpolation signal and the weighted second interpolation signal to generate a third interpolation signal.

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