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    AN APPARATUS AND A METHOD FOR GENERATING A RADIO FREQUENCY SIGNAL
    2.
    发明申请
    AN APPARATUS AND A METHOD FOR GENERATING A RADIO FREQUENCY SIGNAL 审中-公开
    一种用于产生无线电频率信号的装置和方法

    公开(公告)号：WO2017051216A1

    公开(公告)日：2017-03-30

    申请号：PCT/IB2015/057375

    申请日：2015-09-25

    申请人： INTEL IP CORPORATION

    发明人： SIEVERT, Sebastian ,  DEGANI, Ofir ,  RAVI, Ashoke ,  BANIN, Rotem

    IPC分类号： H04L27/36

    CPC分类号： H04L27/362

    摘要： An apparatus for generating a radio frequency signal based on a symbol within a constellation diagram is provided. The constellation diagram is spanned by a first axis representing an in-phase component and an orthogonal second axis representing a quadrature component. The apparatus includes a processing unit configured to select a segment of a plurality of segments of the constellation diagram containing the symbol. The segment is delimited by a third axis and a fourth axis each crossing the origin of the constellation diagram and spanning an opening angle of the segment of less than about 90°. The processing unit is further configured to calculate a first coordinate of the symbol with respect to the third axis, and a second coordinate of the symbol with respect to the fourth axis. The apparatus further includes a plurality of digital-to-analog converter cells configured to generate the radio frequency signal using the first coordinate and the second coordinate.

    摘要翻译： 提供了一种基于星座图内的符号生成射频信号的装置。 星座图由表示同相分量的第一轴和表示正交分量的正交第二轴跨越。 该装置包括：处理单元，被配置为选择包含符号的星座图的多个段的段。 该段由第三轴和第四轴限定，每个轴和第四轴各自与星座图的原点相交，并跨越小于约90°的段的开度角。 处理单元还被配置为计算相对于第三轴的符号的第一坐标和相对于第四轴的符号的第二坐标。 该装置还包括被配置为使用第一坐标和第二坐标产生射频信号的多个数模转换器单元。

    APPARATUS, SYSTEM AND METHOD OF GENERATING A FREQUENCY OUTPUT WITH A DIGITALLY CONTROLLED RING OSCILLATOR (DCRO)
    4.
    发明申请
    APPARATUS, SYSTEM AND METHOD OF GENERATING A FREQUENCY OUTPUT WITH A DIGITALLY CONTROLLED RING OSCILLATOR (DCRO) 审中-公开
    用数字控制环形振荡器（DCRO）产生频率输出的装置，系统和方法

    公开(公告)号：WO2018063231A1

    公开(公告)日：2018-04-05

    申请号：PCT/US2016/054392

    申请日：2016-09-29

    申请人： INTEL IP CORPORATION

    发明人： RAVI, Ashoke ,  BANIN, Rotem ,  DEGANI, Ofir ,  BEN-HAIM, David ,  KALMANOVICH, Yigal

    IPC分类号： H03L7/099

    CPC分类号： H03L7/0995 ,  H03L7/093 ,  H03L2207/50 ,  H04L7/0331 ,  H04L7/08

    摘要： For example, a digital PLL may include a digitally controlled Ring Oscillator (DCRO) configured to generate a frequency output based on a control signal, the DCRO comprising a plurality of stages in a cyclic order, a first stage of the plurality of stages comprising a plurality of inverter modules controlled by the control signal and comprising a plurality of outputs that drive inputs of a plurality of second stages in the plurality of stages; a decoder to decode a phase of the DCRO based on a plurality of sampled phases of the plurality of stages of the DCRO; and a phase error estimator to estimate a phase error based on the phase of the DCRO and a frequency control word, the control signal is based on the phase error.

    摘要翻译： 例如，数字PLL可以包括被配置为基于控制信号生成频率输出的数字控制的环形振荡器（DCRO），DCRO包括循环次序的多个级，第一 所述多级的级包括由所述控制信号控制的多个逆变器模块，并且所述多级包括多个输出，所述多个输出用于驱动所述多级中的多个第二级的输入; 解码器，用于基于DCRO的多个级的多个采样相位来解码DCRO的相位; 以及相位误差估计器，用于基于DCRO的相位和频率控制字估计相位误差，控制信号基于相位误差。

    SWITCHED CAPACITOR RADIO FREQUENCY DIGITAL POWER AMPLIFIER AND RADIO FREQUENCY DIGITAL-TO-ANALOG CONVERTER
    5.
    发明申请
    SWITCHED CAPACITOR RADIO FREQUENCY DIGITAL POWER AMPLIFIER AND RADIO FREQUENCY DIGITAL-TO-ANALOG CONVERTER 审中-公开

    公开(公告)号：WO2019132948A1

    公开(公告)日：2019-07-04

    申请号：PCT/US2017/068853

    申请日：2017-12-29

    申请人： INTEL IP CORPORATION

    发明人： AZAM, Ali ,  RAVI, Ashoke ,  DEGANI, Ofir ,  KHAMAISI, Bassam

    IPC分类号： H03F3/00 ,  H03M1/66

    摘要： A switched capacitor digital power amplifier (DPA) or a digital-to-analog converter (DAC) is disclosed. The DPA/DAC includes a plurality of switched capacitor cells connected in parallel. Each switched capacitor cell includes a capacitor and a switch. The switch selectively drives the capacitor in response to an input digital codeword. The switched capacitor cells are divided into sub-arrays and a series capacitor is inserted in series between two adjacent sub-arrays of switched capacitor cells. All the sub-arrays of switched capacitor cells may be in a unary-coded structure. Alternatively, at least one of the sub-arrays may be in a C-2C structure and at least one another sub-array may be in a unary-coded structure. The switch in the switched capacitor cells is driven by a local oscillator signal, and a phase correction buffer may be added for adjusting a delay of the local oscillator signal supplied to sub-arrays of switched capacitor cells.

    A METHOD AND A SYSTEM FOR CALIBRATING A PHASE NONLINEARITY OF A DIGITAL-TO-TIME CONVERTER
    6.
    发明申请
    A METHOD AND A SYSTEM FOR CALIBRATING A PHASE NONLINEARITY OF A DIGITAL-TO-TIME CONVERTER 审中-公开

    公开(公告)号：WO2019017864A1

    公开(公告)日：2019-01-24

    申请号：PCT/US2017/042306

    申请日：2017-07-17

    申请人： INTEL IP CORPORATION

    发明人： SIEVERT, Sebastian ,  DEGANI, Ofir ,  RAVI, Ashoke

    IPC分类号： H03L7/085 ,  G04F10/00

    摘要： A method for calibrating a phase nonlinearity of a digital-to-time converter is provided. The method includes generating, based on a control word, a reference signal using a phase-locked loop. A frequency of the reference signal is equal to a frequency of an output signal of the digital-to-time converter. Further, the method includes measuring a temporal order of a transition of the output signal from a first signal level to a second signal level, and a transition of the reference signal from the first signal level to the second signal level. The method additionally includes adjusting a first entry of a look-up table based on the measured temporal order.

    CALIBRATION OF DYNAMIC ERROR IN HIGH RESOLUTION DIGITAL-TO-TIME CONVERTERS
    8.
    发明申请
    CALIBRATION OF DYNAMIC ERROR IN HIGH RESOLUTION DIGITAL-TO-TIME CONVERTERS 审中-公开
    高分辨率数字时间转换器中的动态误差校准

    公开(公告)号：WO2017052876A1

    公开(公告)日：2017-03-30

    申请号：PCT/US2016/047982

    申请日：2016-08-22

    申请人： INTEL IP CORPORATION

    发明人： RAVI, Ashoke ,  DEGANI, Ofir ,  BANIN, Rotem ,  BEN-BASSAT, Assaf

    IPC分类号： G04F10/00 ,  H03K5/135 ,  H03M1/10 ,  H03M1/82

    CPC分类号： H04L7/042 ,  G04F10/005 ,  H03K5/135 ,  H03M1/1061 ,  H03M1/82 ,  H04B1/0475 ,  H04L7/0054

    摘要： A calibration system operates to calibrate or correct a digital-to-time converter (DTC) that comprises a detector component and a distortion correction component. The DTC can receive one or more signals and a digital code to generate a modulation signal by controlling an offset of the one or more signals based on the digital code. The detector component can comprise a TDC or another DTC that operates to measure a dynamic behavior in response to detecting nonlinearities of the modulation signal. The distortion correction component can generate a set of distortion data that removes the dynamic behavior from an output of the DTC based on the measurement.

    摘要翻译： 校准系统用于校准或校正包括检测器部件和失真校正部件的数字 - 时间转换器（DTC）。 DTC可以通过基于数字代码控制一个或多个信号的偏移来接收一个或多个信号和数字代码以产生调制信号。 检测器部件可以包括TDC或另一个DTC，其操作以响应于检测到调制信号的非线性来测量动态特性。 失真校正组件可以生成一组基于测量从DTC的输出消除动态特性的失真数据。