METHOD FOR PRODUCING A CARRIER FOR AN OPTOELECTRONIC COMPONENT, AND CARRIER FOR AN OPTOELECTRONIC COMPONENT

    公开(公告)号:WO2018149511A1

    公开(公告)日:2018-08-23

    申请号:PCT/EP2017/053798

    申请日:2017-02-20

    发明人: LIM, Choo Kean

    IPC分类号: H01L33/62

    摘要: The invention refers to a method for producing a carrier for an optoelectronic component, wherein a subcarrier is provided, wherein a first mask layer is deposited on the subcarrier, wherein the first mask layer has at least two mask openings extending from an upper side of the first mask layer to a bottom side of the first mask layer, wherein the first mask layer covers predetermined areas of the subcarrier and provides at least two free areas of the subcarrier in the mask openings, wherein electroconductive material is deposited in the mask openings and on the free areas of the subcarrier, wherein the first mask layer is removed providing two separate lead frame sections made of electroconductive material, wherein the two lead frame sections are arranged side by side with a free space between two side faces of the two lead frame sections, wherein mould material is formed in the free space between the two lead frame sections forming a mould material layer connecting the two side faces of the two lead frame sections, removing the subcarrier and attaining the carrier with two lead frame sections, wherein the lead frame sections are connected by a mould material layer.

    METHOD FOR PRODUCING AN OPTOELECTRONIC ELEMENT

    公开(公告)号:WO2018134203A1

    公开(公告)日:2018-07-26

    申请号:PCT/EP2018/051017

    申请日:2018-01-16

    摘要: The invention refers to a method for producing an optoelectronic element with a light emitting component (1), wherein at least above a part of a light emitting side of the light emitting component (1) a sacrificial layer (9) is arranged, wherein at least in a part of an outer surface of the sacrificial layer (9) an inverted optic structure is formed, wherein the outer surface of the sacrificial layer (9) is covered by a light transparent layer (13), wherein the inverted optic structure is transferred to an inner side of the light transparent layer (13) forming an optic structure (18), wherein the sacrificial layer (9) is removed and a gap is formed between the light emitting component (1) and the light transparent layer (13), and wherein the light transparent layer (13) comprises at the inner side thereof the optic structure (18).

    VERFAHREN ZUR HERSTELLUNG EINER VIELZAHL VON OBERFLÄCHENMONTIERBAREN TRÄGERVORRICHTUNGEN, ANORDNUNG EINER VIELZAHL VON OBERFLÄCHENMONTIERBAREN TRÄGERVORRICHTUNGEN UND OBERFLÄCHENMONTIERBARE TRÄGERVORRICHTUNG
    4.
    发明申请
    VERFAHREN ZUR HERSTELLUNG EINER VIELZAHL VON OBERFLÄCHENMONTIERBAREN TRÄGERVORRICHTUNGEN, ANORDNUNG EINER VIELZAHL VON OBERFLÄCHENMONTIERBAREN TRÄGERVORRICHTUNGEN UND OBERFLÄCHENMONTIERBARE TRÄGERVORRICHTUNG 审中-公开
    用于生产表面的各种方法安装面的各种载流子器件的形成安装载流子器件和表面安装器件CARRIER

    公开(公告)号:WO2015055247A1

    公开(公告)日:2015-04-23

    申请号:PCT/EP2013/071720

    申请日:2013-10-17

    摘要: Es wird ein Verfahren zur Herstellung einer Vielzahl von oberflächenmontierbaren Trägervorrichtungen angegeben. Das Verfahren umfasst insbesondere folgende Schritte: A) Bereitstellen einer Trägerplatte (10) mit einer ersten Hauptfläche (11) und einer der ersten Hauptfläche (11) gegenüberliegenden zweiten Hauptfläche (12), B) Aufbringen einer elektrischleitenden Schicht (2) auf die erste Hauptfläche (11) der Trägerplatte (10), C) Aufbringen einer Lotstoppmaske (30) auf einer der Trägerplatte (10) abgewandten Seite der elektrisch leitenden Schicht (2), wobei durch die Lotstoppmaske (30) eine Vielzahl aneinandergrenzender Bereiche (3) auf der elektrisch leitenden Schicht (2) ausgebildet wird, D) Aufbringen eines Lotmaterials (4) auf die Lotstoppmaske (30) und die elektrisch leitende Schicht (2), wobei die Lotstoppmaske (30) und die elektrisch leitende Schicht (2) zumindest stellenweise von dem Lotmaterial (4) bedeckt werden, E) Vereinzeln der Trägerplatte (10) und der elektrisch leitenden Schicht (2) entlang und durch die Lotstoppmaske (30) und das Lotmaterial (4), wobei das Lotmaterial (4) zumindest stellenweise auf der Lotstoppmaske (30) verbleibt.

    摘要翻译: 本发明提供一种制造多个表面安装器件的载体的方法。 该方法包括特别是以下步骤:A)提供一个支撑板(10),具有第一主表面(11)和所述第一主表面中的一个(11)相对的第二主表面(12),B)在所述第一主表面上施加导电(2)层 (11)在支撑板(10),C)将Lotstoppmaske(30)(在支撑板10中的一个)的面向从导电层(2),其中(由Lotstoppmaske远侧(30)包括多个在所述连续区域3)的 被设计为施加钎焊材料的导电层(2),D)(4)(在Lotstoppmaske 30)和导电层(2),其中,所述Lotstoppmaske(30)和导电层(2)至少在从地方 钎焊材料(4)覆盖,E)(2)和沿(通过Lotstoppmaske 30中分离载体板(10)和导电层)和焊接材料(4),其中,所述钎焊材料(4 )至少在某些地方仍保留在Lotstoppmaske(30)。

    CARRIER AND OPTOELECTRONIC COMPONENT
    5.
    发明申请

    公开(公告)号:WO2019048061A1

    公开(公告)日:2019-03-14

    申请号:PCT/EP2017/072692

    申请日:2017-09-11

    IPC分类号: H01L33/62 H01L33/48

    摘要: The invention relates to a carrier for an optoelectronic semi-conductor chip, comprising a flat top side, a flat underside and a first side surface. The carrier comprises a first lead frame section,which ranges from the top side to the underside of the carrier, embedded within an insulating material. The first lead frame section comprises a first tie bar, extending to the first side surface. At the first side surface, the insulating material is arranged between the top side of the carrier and the first tie bar as well as between the under-side of the carrier and the first tie bar.

    METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT AND OPTOELECTRONIC COMPONENT

    公开(公告)号:WO2019007513A1

    公开(公告)日:2019-01-10

    申请号:PCT/EP2017/066950

    申请日:2017-07-06

    摘要: According to at least one embodiment the method for producing an optoelectronic component (100) comprises a step A), in which an intermediate film (1) is provided. In a step B) a plurality of optoelectronic semiconductor chips (2) is attached on predetermined locations of the intermediate film (1). In a step C) a cavity film (3) with a plurality of separated openings (30) is provided. In a step D) the cavity film (3) is attached to the intermediate film (1) such that each optoelectronic semiconductor chip (2) is associated with a respective opening (30). The cavity film (3) is thicker than the optoelectronic semiconductor chips (2) such that the cavity film (3) exceeds the optoelectronic semiconductor chips (2) in a direction away from the intermediate film (1). In a step E) a casting material (4) is filled in each of the openings (30) such that the optoelectronic semiconductor chips (2) are casted with the casting material (4). In a step F) the intermediate film (1) is removed.

    METHOD OF ETCHING A METAL LEAD FRAME
    8.
    发明申请
    METHOD OF ETCHING A METAL LEAD FRAME 审中-公开
    蚀刻金属铅框架的方法

    公开(公告)号:WO2017114564A1

    公开(公告)日:2017-07-06

    申请号:PCT/EP2015/081355

    申请日:2015-12-29

    IPC分类号: H01L21/48

    CPC分类号: H01L21/4828

    摘要: A method of etching a metal lead frame for a semiconductor chip includes the application of an etching agent to a metal plate using a first and a second spray nozzle, which are located on opposite sides of the metal plate. The volumetric flow rate of the etching agent applied to the metal plate via the first spray nozzle is at least 10 % different from the volumetric flow rate of the etching agent applied to the metal plate via the second spray nozzle. A metal plate with an etching trench extending from a first side of the metal plate to a second side of the metal plate is disclosed. The etching trench comprises a first section and a second section, wherein a first side wall and a second side wall of the etching trench are basically perpendicular to the first side of the metal plate in the first section. A third side wall and a fourth side wall limit the etching trench within the second section. The first section of the etching trench extends from the first side of the metal plate to approximately one third of the thickness of the metal plate and the second section extends from the second side of the metal plate to approximately two thirds of the thickness of the metal plate. The first side of the metal plate adjoins the first side wall, which adjoins the third side wall, which adjoins the second side of the metal plate. The first side of the metal plate adjoins the second side wall, which adjoins the fourth side wall, which adjoins the second side of the metal plate. The third and fourth side wall are inclined compared to the first and second side wall in a way that the distance between the first and the second side wall is smaller than the distance between the third and the fourth side wall.

    摘要翻译: 蚀刻用于半导体芯片的金属引线框架的方法包括使用第一和第二喷嘴将蚀刻剂施加到金属板,所述第一和第二喷嘴位于金属板的相对侧上 。 通过第一喷嘴施加到金属板上的蚀刻剂的体积流量与通过第二喷嘴施加到金属板上的蚀刻剂的体积流量不同至少10%。 公开了一种具有从金属板的第一侧延伸到金属板的第二侧的蚀刻沟槽的金属板。 蚀刻沟槽包括第一部分和第二部分,其中蚀刻沟槽的第一侧壁和第二侧壁基本垂直于第一部分中的金属板的第一侧。 第三侧壁和第四侧壁将蚀刻沟槽限制在第二部分内。 蚀刻槽的第一部分从金属板的第一侧延伸到金属板厚度的约三分之一,并且第二部分从金属板的第二侧延伸到金属厚度的约三分之二 盘子。 金属板的第一侧邻接第一侧壁,第一侧壁邻接第三侧壁,邻接金属板的第二侧。 金属板的第一侧邻接与第四侧壁邻接的第二侧壁,第二侧壁邻接金属板的第二侧。 与第一和第二侧壁相比,第三和第四侧壁以第一和第二侧壁之间的距离小于第三和第四侧壁之间的距离的方式倾斜。

    SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING A CARRIER ELEMENT SUITABLE FOR A SEMICONDUCTOR DEVICE

    公开(公告)号:WO2019114968A1

    公开(公告)日:2019-06-20

    申请号:PCT/EP2017/082814

    申请日:2017-12-14

    摘要: A semiconductor device (1) is described comprising - a carrier element (2) comprising - a carrier layer (4) comprising a first depression (5) extending from a first main surface (4A) of the carrier layer (4) in a direction of a second main surface (4B) of the carrier layer (4) opposite the first main surface (4A), and further comprising a metal substrate (7) and an electrically insulating layer (8) on at least a portion of the metal substrate (7), - a first electrically conductive filling component (9) arranged in the first depression (5) in a form-fitting manner, the electrically insulating layer (8) being arranged between the metal substrate (7) and the first filling component (9), - a semiconductor chip (3) being arranged on the carrier element (2), wherein the electrically insulating layer (8) is an anodization layer. And a method for producing a carrier element (2) suitable for a semiconductor device (1) is described.