公开(公告)号：WO2011146364A2

公开(公告)日：2011-11-24

申请号：PCT/US2011/036599

申请日：2011-05-16

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： PATAPOUTIAN, Ara ,  SRIDHARA, Deepak ,  BUCH, Bruce, Douglas

IPC: G11C11/56 ,  G06F11/10

CPC classification number: G11C11/5628 ,  G11C29/00 ,  G11C2216/14

Abstract: Multiple logical pages are jointly encoded into a single code word and are stored in the same physical page of a solid state non-volatile memory (NVM) device having multi¬ level memory cells. A first logical page of the multiple logical pages is stored in the memory device as first bits of the multi-level memory cells while a second logical page of the multiple logical pages is temporarily cached. After the first logical page is stored as the first bits of the memory cell, the second logical page is stored as second bits of the memory cells.

Abstract translation: 多个逻辑页面被联合编码为单个码字，并被存储在具有多层存储器单元的固态非易失性存储器（NVM）设备的相同物理页面中。 多个逻辑页面的第一逻辑页面被存储在存储器设备中作为多级存储器单元的第一位，而多个逻辑页面的第二逻辑页面被临时高速缓存。 在将第一逻辑页面存储为存储器单元的第一位之后，第二逻辑页面被存储为存储器单元的第二位。

公开(公告)号：WO2011146355A1

公开(公告)日：2011-11-24

申请号：PCT/US2011/036585

申请日：2011-05-16

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： PATAPOUTIAN, Ara ,  BUCH, Bruce, Douglas ,  SRIDHARA, Deepak

IPC: G11C11/56 ,  G06F11/10

CPC classification number: G11C11/5642 ,  G11C2029/0411

Abstract: Methods and systems for accessing encoded data stored in a solid state non-volatile memory device include iteratively demodulating and decoding the data. The memory device includes memory cells (102) arranged to store multiple bits of data per memory cell. The memory cells are capable of storing multiple logical pages of data. Each bit (LSB, MSB) stored in a memory cell is associated with a logical page (120, 121) of data that is different from other logical pages associated with other bits stored in the memory cell. The multiple logical pages are demodulated responsive to sensed voltage levels of the memory cells, and a demodulated output is provided for each logical page of the multiple logical pages (20, 121). A decoded output for each page of the multiple pages is generated. Decoding the page and demodulating the multiple logical pages proceeds iteratively, including an exchange of information between the decoder and the demodulator comprising hard data estimates and/or data confidence information.

Abstract translation: 用于访问存储在固态非易失性存储器件中的编码数据的方法和系统包括对数据进行迭代解调和解码。 存储器件包括被布置为存储每个存储器单元的多个数据位的存储器单元（102）。 存储器单元能够存储数据的多个逻辑页面。 存储在存储器单元中的每个位（LSB，MSB）与不同于与存储在存储单元中的其它位相关联的其它逻辑页的数据的逻辑页面（120,121）相关联。 多个逻辑页面响应于感测的存储器单元的电压电平被解调，并且为多个逻辑页面（20,121）的每个逻辑页面提供解调输出。 生成多页的每页的解码输出。 包括在包括硬数据估计和/或数据置信度的解码器和解调器之间的信息交换，迭代地进行页面的解码和解调多个逻辑页面。