公开(公告)号：WO2014085410A1

公开(公告)日：2014-06-05

申请号：PCT/US2013/071919

申请日：2013-11-26

Applicant: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.

Inventor： RINZLER, Andrew, Gabriel ,  LIU, Bo ,  MCCARTHY, Mitchell, Austin

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L51/057 ,  B82Y10/00 ,  H01L27/092 ,  H01L27/283 ,  H01L29/0673 ,  H01L29/1606 ,  H01L29/413 ,  H01L29/7395 ,  H01L29/775 ,  H01L51/0039 ,  H01L51/0047 ,  H01L51/0048 ,  H01L51/0566 ,  H01L51/102 ,  H01L51/105

Abstract: Various examples are provided for ambipolar vertical field effect transistors (VFETs). In one example, among others, an ambipolar VFET includes a gate layer; a source layer that is electrically percolating and perforated; a dielectric layer; a drain layer; and a semiconducting channel layer. The semiconducting channel layer is in contact with at least a portion of the source layer and at least a portion of the dielectric layer and the source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier. Another example includes an ambipolar vertical field effect transistor including a dielectric surface treatment layer. The semiconducting channel layer is in contact with at least a portion of the source layer and at least a portion of the dielectric surface treatment layer and where the source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Abstract translation: 为双极性垂直场效应晶体管（VFET）提供了各种示例。 在一个实例中，其中双极型VFET包括栅极层; 电渗透和穿孔的源层; 介电层; 一个漏极层; 和半导体沟道层。 半导体沟道层与源极层的至少一部分接触，并且介电层的至少一部分以及源极层和半导体沟道层形成栅极电压可调电荷注入势垒。 另一个例子包括包括电介质表面处理层的双极性垂直场效应晶体管。 半导体沟道层与源极层的至少一部分和介电表面处理层的至少一部分接触，并且其中源极层和半导体沟道层形成栅极电压可调电荷注入势垒。

公开(公告)号：WO2012078759A2

公开(公告)日：2012-06-14

申请号：PCT/US2011/063745

申请日：2011-12-07

Applicant: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC. ,  RINZLER, Andrew, Gabriel ,  MCCARTHY, Mitchell, Austin ,  LIU, Bo

Inventor： RINZLER, Andrew, Gabriel ,  MCCARTHY, Mitchell, Austin ,  LIU, Bo

IPC: H01L51/05 ,  H01L29/786

CPC classification number: H01L51/5203 ,  B82Y99/00 ,  H01L27/3262 ,  H01L27/3274 ,  H01L29/1606 ,  H01L29/7827 ,  H01L51/0045 ,  H01L51/0048 ,  H01L51/057 ,  H01L51/102 ,  H01L51/5296

Abstract: Various embodiments are provided for dilute source enabled vertical organic light emitting transistors. In various embodiments, a display panel includes an array of pixels. In one embodiment, among others, at least one pixel includes a switching transistor and a driving transistor coupled to the switching transistor, where the driving transistor is configured to emit light responsive to activation by the switching transistor. The driving transistor may be a dilute source enabled vertical organic light emitting transistor (DS- VOLET). The switching transistor may include a dilute source enabled vertical-field effect transistor (DS-VFET). In another embodiment, a double dilute source enabled vertical-field effect transistor (DS-VFET) includes a first DS-VFET coupled to a second DS-VFET.

Abstract translation: 提供了用于稀释源的垂直有机发光晶体管的各种实施例。 在各种实施例中，显示面板包括像素阵列。 在一个实施例中，至少一个像素包括开关晶体管和耦合到开关晶体管的驱动晶体管，其中驱动晶体管被配置为响应于开关晶体管的激活而发光。 驱动晶体管可以是具有稀释源的垂直有机发光晶体管（DS-VOLET）。 开关晶体管可以包括具有稀释源的垂直场效应晶体管（DS-VFET）。 在另一个实施例中，双稀释源使能的垂直场效应晶体管（DS-VFET）包括耦合到第二DS-VFET的第一DS-VFET。

公开(公告)号：WO2014071343A1

公开(公告)日：2014-05-08

申请号：PCT/US2013/068402

申请日：2013-11-05

Applicant: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.

Inventor： LIU, Bo ,  RINZLER, Andrew, Gabriel ,  MCCARTHY, Mitchell, Austin

IPC: G09G3/30 ,  G09G3/32

CPC classification number: G09G3/3258 ,  G09G3/3208 ,  G09G3/3225 ,  G09G3/3233 ,  G09G3/325 ,  G09G3/3275 ,  G09G3/3283 ,  G09G3/3291 ,  G09G2300/0819 ,  G09G2320/0209 ,  G09G2320/0223 ,  G09G2320/0233

Abstract: Various examples are provided for brightness compensation in a display. In one example, a method includes identifying an IR voltage drop effect on a pixel supplied by a supply voltage line and generating a brightness signal for the pixel based at least in part on the IR voltage drop effect. In another example, a method includes calculating values of IR voltage drop corresponding to pixels fed by a common supply voltage line and providing a data line signal to each pixel that compensates for the IR voltage drop. In another example, a display device includes a matrix of pixels and a brightness controller configured to determine an IR voltage drop effect on a pixel of the matrix and generate a brightness signal for the pixel based at least in part on the IR voltage drop effect and a temporal average pixel brightness within one refreshing cycle associated with the pixel.

Abstract translation: 提供了用于显示器中的亮度补偿的各种示例。 在一个示例中，一种方法包括识别由电源电压线提供的像素上的IR电压降效应，并且至少部分地基于IR电压降效应产生用于像素的亮度信号。 在另一示例中，一种方法包括计算对应于由公共电源电压线馈送的像素的IR电压降的值，并向补偿IR电压降的每个像素提供数据线信号。 在另一示例中，显示设备包括像素矩阵和亮度控制器，其被配置为确定对矩阵的像素的IR电压降效应，并且至少部分地基于IR电压降效应产生用于像素的亮度信号，以及 与像素相关联的一个刷新周期内的时间平均像素亮度。

公开(公告)号：WO2009036071A9

公开(公告)日：2009-03-19

申请号：PCT/US2008/075866

申请日：2008-09-10

Applicant: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC. ,  RINZLER, Andrew, Gabriel ,  LIU, Bo ,  MCCARTHY, Mitchell, Austin ,  REYNOLDS, John, Robert ,  SO, Franky

Inventor： RINZLER, Andrew, Gabriel ,  LIU, Bo ,  MCCARTHY, Mitchell, Austin ,  REYNOLDS, John, Robert ,  SO, Franky

IPC: H05B33/00 ,  H01L29/00 ,  H01L33/00

Abstract: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.