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1.发明申请
公开(公告)号：WO2021252088A1
公开(公告)日：2021-12-16
申请号：PCT/US2021/029222
申请日：2021-04-26
Applicant: ZEKU, INC.
Inventor： LOW, Su-Lin , MA, Tianan , LEE, Chun-I
Abstract: Embodiments of apparatus and method for data packet processing are disclosed. In one example, an apparatus for data packet processing can include a plurality of microcontrollers configured to perform dedicated layer-two circuit control functions. The plurality of microcontrollers can be configured to concurrently retrieve data from a set of common logical channels. The dedicated layer-two circuit control functions can include logical channel prioritization. The apparatus can also include a data processing layer-two circuit configured to perform data processing on the set of common logical channels based on commands received from the plurality of microcontrollers. The plurality of microcontrollers can be configured to receive uplink grants from a plurality of component carriers, to perform scheduling of the data based on the uplink grants, and to instruct the data processing layer-two circuit to retrieve the data responsive to the uplink grants.
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2.发明申请
公开(公告)号：WO2021108812A1
公开(公告)日：2021-06-03
申请号：PCT/US2021/014945
申请日：2021-01-25
Applicant: ZEKU, INC.
Inventor： MA, Tianan Tim , YANG, Hong Kui , LOW, Su-Lin , HONG, Hausting
Abstract: Introduced here are approaches to classifying traffic that comprises data packets. For each data packet, a classification engine implemented on a computing device can identify an appropriate class from amongst multiple classes using a lookup table implemented in a memory. The memory could be, for example, static random-access memory (SRAM) as further discussed below. Moreover, the classification engine may associate an identifier with each data packet that specifies the class into which the data packet has been assigned. For example, each data packet could have an identifier appended thereto (e.g., in the form of metadata). Then, the data packets can be placed into queues based on the identifiers. Each queue may be associated with a different identifier (and thus a different class).
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公开(公告)号：WO2021087527A1
公开(公告)日：2021-05-06
申请号：PCT/US2021/014937
申请日：2021-01-25
Applicant: ZEKU, INC.
Inventor： LOW, Su-Lin , LEE, Chun-I , MA, Tianan Tim , YANG, Hong Kui , HONG, Hausting
Abstract: Methods for managing a scheduling service for communications (e.g., uplink medium access control (MAC) grants) are disclosed herein. The method includes (i) determining a score for each of multiple service grants from multiple cells based on a scoring function, wherein the scoring function includes one or more radio channel conditions associated with the multiple service grants; (ii) prioritizing the multiple service grants based on the determined scores; and (iii) assigning scheduling opportunities to the multiple service grants based on the determined scores of the multiple cells in a geometric decreasing manner.
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4.发明申请
公开(公告)号：WO2023091125A1
公开(公告)日：2023-05-25
申请号：PCT/US2021/059490
申请日：2021-11-16
Applicant: ZEKU, INC.
Inventor： BAGCHI, Sonali , MA, Tianan Tim , LI, Yunhong , LOW, Su-Lin , LEE, Chun-I , WANG, Yanming , CHEN, Jinghu
Abstract: According to one aspect of the disclosure, a MAC hardware accelerator of a baseband chip is provided. The medium access control (MAC) hardware accelerator may include a MAC-physical (PHY) layer interface configured to receive, from a PHY layer transmitter (Tx), a request for a first number of bytes for a transport block (TB) associated with a component carrier (CC). The MAC hardware accelerator may obtain a MAC protocol data unit (PDU) from a MAC inline buffer associated with the CC. The MAC -PHY layer interface transfer the MAC PDU to the PHY layer Tx during a first period associated with the TB. In response to determining that the MAC inline buffer does not include the first number of bytes, the MAC -PHY layer interface may b implement a recovery mechanism at an end of the first period to maintain synchronization between the MAC hardware accelerator and the PHY layer Tx.
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公开(公告)号：WO2021087528A1
公开(公告)日：2021-05-06
申请号：PCT/US2021/014939
申请日：2021-01-25
Applicant: ZEKU, INC.
Inventor： LOW, Su-Lin , LEE, Chun-I , MA, Tianan Tim , HONG, Hausting , YANG, Hong Kui
Abstract: Apparatus and methods for performing a Million Instructions per Second (MIPS) analysis for a data stack of a user equipment (UE) are disclosed. The method includes (i) receiving an input for a Monte Carlo simulation, the input including a requirement for one or more use cases, a processor specification, and a user-specified function; (ii) determining a traffic model, a number of packets to be run for each use case, and a seed value for the Monte Carlo simulation; (iii) performing the Monte Carlo simulation based on the input and the traffic model to generate a simulation result; and (iv) determining a recommended configuration of processor cores for the data stack based on the simulation result.
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Patent Agency Ranking
公开(公告)号：WO2021077124A1
公开(公告)日：2021-04-22
申请号：PCT/US2020/061403
申请日：2020-11-20
Applicant: ZEKU, INC.
Inventor： LOW, Su-Lin , YANG, Hong, Kui
Abstract: Embodiments of apparatus and method for fallback handling are disclosed. In an example, a method for fallback handling can include operating a user equipment in a fifth-generation (5G) radio access technology. The method can also include maintaining second-generation (2G) and third-generation (3G) physical layer components in a warm state. The method can additionally include maintaining 2G and 3G layer 2 components in an inactive state.
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公开(公告)号：WO2021035231A2
公开(公告)日：2021-02-25
申请号：PCT/US2020/065762
申请日：2020-12-17
Applicant: ZEKU, INC.
Inventor： LOW, Su-Lin , MA, Tianan , SONG, XiaoFei , YANG, Hong Kui , HONG, Hausting
Abstract: Embodiments of apparatuses and methods for uplink data transmission preparation are disclosed. In an example, a method for packet preparation can include creating, in a medium access control circuit, a packet list corresponding to a packet data unit for transmission. The method can also include providing the packet data unit to a physical layer circuit. The method can further include receiving, at the medium access control circuit from the physical layer circuit, information indicative of relationships between a plurality of code block groups and the packet data unit. The method can additionally include storing an association between the packet list and the plurality of code block groups based on the received information.
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公开(公告)号：WO2021252053A1
公开(公告)日：2021-12-16
申请号：PCT/US2021/025729
申请日：2021-04-05
Applicant: ZEKU, INC.
Inventor： MA, Tianan Tim , LOW, Su-Lin , HONG, Hausting , LEE, Chun-I , LI, Jianzhou , YANG, Hong Kui , QIAN, Xiaoshu , GU, Jian , WANG, Chenxi
Abstract: Introduced here is at least one technique to save power in the physical (PHY) layer to medium access (MAC) layer interface, The technique includes receiving, at the MAC layer, a plurality of code blocks (CBs), which make up a portion of the transport block (TB). The plurality of CBs is associated with an error rate. The error rate is indicative of the number of missing CBs and/or that the plurality of CBs is out of order. If the error rate is above a threshold value, the MAC layer stores the plurality of CBs in external memory. If not, the MAC layer processes the plurality of CBs for, for example, transmission to an upper layer. In this manner, the PHY layer transmits the CBs from the base station to the MAC layer, without first storing the CBs in memory until all the CBs of the corresponding TB are received.
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公开(公告)号：WO2021165740A1
公开(公告)日：2021-08-26
申请号：PCT/IB2020/062263
申请日：2020-12-21
Applicant: ZEKU INC.
Inventor： MA, Tianan Tim , LOW, Su-Lin , HONG, Hausting , YANG, Hong Kui
Abstract: Embodiments of apparatuses and methods for de-segmentation may be applicable to communication systems, such as wireless communication systems. In an example, a baseband chip may include at least one memory configured to store at least a descriptor of a first packet segment having a first segment offset value. The baseband chip may also include a de-segmentation circuit configured to compare a second segment offset value of a second packet segment to the first segment offset value. The de-segmentation circuit may be configured to store a descriptor of the second packet segment in the at least one memory in a position relative to the descriptor of the first packet segment based on the comparison between the first segment offset value and the second segment offset value.
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公开(公告)号：WO2021152369A1
公开(公告)日：2021-08-05
申请号：PCT/IB2020/059912
申请日：2020-10-22
Applicant: ZEKU INC.
Inventor： LOW, Su-Lin , YANG, Hong Kui , MA, Tianan Tim , HONG, Hausting
Abstract: Embodiments of apparatuses and methods for memory handling may be applicable to communication systems, such as wireless communication systems. In an example, an apparatus for memory handling may include an external memory configured to store layer three (L3) data and an internal memory configured to store layer two (L2) data. The apparatus may further include circuitry configured to process a header of a packet and move the header from the external memory to the internal memory, process a remainder of the packet upon determination that at least two predetermined conditions are met, and pass the remainder of the packet from the external memory to the internal memory.
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