摘要:
An oscillator/amplifier has a gain controlled amplifier that maintains a desired oscillation waveform amplitude for all possible oscillation frequencies of operation. A peak detector produces a direct current (DC) voltage proportional to the oscillation waveform, and a voltage reference generator provides a reference voltage that is compared against the DC voltage from the peak detector. When the DC voltage is less than the reference voltage the gain of the amplifier is increased, and when the DC voltage is equal to or greater than the reference voltage the gain of the amplifier is decreased. A programmable voltage reference generator may also be used to provide for selection of different oscillation waveform amplitudes. A digital control loop controls the oscillation waveform amplitude over the entire possible frequency range of operation. Various frequency determining elements, e.g., crystal, piezoelectric resonator, inductor-capacitor tuned circuit, resistor-capacitor network, etc., may be used in combination with the oscillator/amplifier.
摘要:
A circuit arrangement for obtaining an output signal (Va) form a signal (Vs) containing at least one alternating component comprises a signal source (1) that supplies this signal (Vs), a first peak value detection device (2) for determining a maximum value (Vmax) of the signal (Vs), a second peak value detection device (3) for determining a minimum value (Vmin) of the signal (Vs), a first signal linking device (4, 5, 6, 71) for obtaining a first resulting signal (V1) by additive linking of the signal (Vs), the maximum value (Vmax) and the minimum value (Vmin) in accordance with the rule: V1 = K1*{Vs - (Vmax + Vmin)/2}, in which K1 is a freely selectable first constant factor, a second signal linking device (7, 72) for obtaining a second resulting signal (V2) by additive linking of the maximum value (Vmax) and a minimum value (Vmin) in accordance with the rule: V2 = (Vmax - Vmin)*K2, in which K2 is a freely selectable second factor, a first squaring device (8) for squaring the first resulting signal (V1), a second squaring device (9) for squaring the second resulting signal (V2) and a third signal linking device (100, 11, 101) for obtaining the output signal (Va) by additive linking of the squared first resulting signal ((V1) 2 ) and the squared second resulting signal ((V2) 2 ) in accordance with the rule: Va = K3*{(1/8)*(K1/K2) 2 *(V2) 2 - (V1) 2 }, in which K3 is a freely selectable third constant factor. By means of the invention, which furthermore includes a rotational speed measurement device comprising such a circuit arrangement and also a method of obtaining an output signal, an unchanged or increased resolution of the output signal can be achieved from the signal containing an alternating component having a restricted resolution.
摘要:
A noise reduction circuit useful as a clock restoration circuit includes a DC removal circuit (67) for removing a DC level from an input pulse train. An integrator (54) integrates the input pulse train after a DC level has been removed and a comparator (59) compares the integrator output with a threshold value (Vmp) to detect for a missing pulse. A pulse generator (65) inserts into the input pulse train an additional pulse delayed with respect to any missing pulse and an output pulse train having reduced noise is derived from the integrator output.
摘要:
A circuit is disclosed for driving a motor. In order to regulate the speed of and/or switch a motor, it is known to associate several sensors with the motor to generate several phase-shifted sensor signals of the same type that indicate the position of the rotor. Driving signals for switching or regulating the speed of the motor are derived from said signals in a hysteresis comparator. In practical operation, interferences are superimposed on the signals at the outputs of the sensors. These interferences are due for example to the motor coils and affect the evaluation. The object of the invention is to develop a circuit of said type that is able to suppress interferences even when the motor stands still and that retains this ability for an unlimited time. For that purpose, switching means cause the rate of hysteresis for each sensor signal (a) to depend at each comparator (A) from the amplitude of one or several other sensor signals (b, c). The sensor signals are preferably supplied to an OR stage (Da, Db, Dc), the output voltage of which controls the hysteresis at the comparators (A, B, C). This circuit is particularly suitable for regulating the speed of or switching a capstan motor in a videorecorder.
摘要:
A proximity detector circuit that receives a single-ended sensor signal includes (a) an adaptive level control circuit maintaining the single-ended sensor signal within a predetermined voltage range relative a common mode reference signal; and (b) a programmable gain amplifier receiving the single-ended sensor signal and the common mode reference signal as a differential input signal, and providing an output signal derived from amplifying the differential input signal.
摘要:
A buffer for converting sinusoidal waves to square waves with reduced phase noise is described herein. The buffer shunts current from the outputs of a differential amplifier during sinusoidal state transition periods at the differential amplifier inputs to increase the finite slope of square wave transition periods of the output square wave. More particularly, a sinusoidal wave having alternating peaks and valleys connected by sinusoidal state transition periods is applied to differential inputs of a differential amplifier to generate a square wave at the differential outputs, where the output square wave comprises alternating high and low states connected by square wave state transition periods having a finite slope. The output square wave is shaped to increase the finite slope of the square wave transition periods by providing additional paths between the differential outputs and ground that shunt current from the differential amplifier during the sinusoidal state transition periods.
摘要:
The present specification provides a method, apparatus and system for sensing a signal with automatic adjustments for changing signal levels. A novel fractional peak discriminator circuit is provided which can be incorporated into a system for measuring periodic signals from moving elements. The circuit can be used regardless of whether the periodic signals are detected using optics, magnetic detector or other methods.
摘要:
An improved fast settling bit slicing comparator circuit includes a comparator having a non-inverting and inverting input; the non-inverting input receiving an input signal; a filter circuit for receiving the input signal and being connected with the inverting input of the comparator; a positive feedback circuit interconnected between the output of the comparator and the non-inverting input of the comparator for introducing a predetermined hysteresis offset; the filter circuit including a filter resistance and filter capacitance having a reduced time constant sufficient to compensate for at least a portion of the hysteresis offset. Additionally, the positive feedback circuit may be interconnected with the inverting input of the comparator through the filter circuit for gradually reducing the effect of the hysteresis offset by reducing the differential voltage between the inverting and non-inverting inputs.
摘要:
In a method and circuit for recovering a sync signal from an input sync signal passing through a cable to a display device, an average value of the input sync signal is obtained during a predetermined time period so as to obtain a sync threshold, which is compared with the input sync signal. A sync signal is output when the input sync signal is greater than the sync threshold.