Abstract:
A transceiver includes a processor and an analog-to-digital converter. The processor is adapted to in a transmit mode of the transceiver, generate a modulated signal in response to a first digital signal. In a receive mode of the transceiver, the processor is adapted to generate a demodulated signal in response to a second digital signal. The analog-to-digital converter provides the first digital signal in the transmit mode and provides the second digital signal in the receive mode.
Abstract:
Disclosed herein are systems and methods that describe a noise-shaping (NS) SAR architecture that can be simple, effective, and low power. In an aspect, a method includes the operation of receiving a first analog input; determining a first digital output based on the first analog input; obtaining a first quantization error for the first digital output; integrating the first quantization error; receiving a second analog input; and determining a second digital output based on the summation of the second analog input and the first integrated quantization error to perform noise-shaping.
Abstract:
The electronic circuit (5) comprises a sigma-delta modulator (20) having a configurable resolution and a mode selector (30). The sigma-delta modulator (20) is selectively operable in at least two operation modes. The mode selector (30) is configured to determine a desired operation mode dependent on an externally provided control signal (Ctrl) and to select the resolution of the sigma-delta modulator (20) according to the determined operation mode.
Abstract:
Systems and methods are disclosed that employ a programmable analog-to-digital converter system. A programmable analog-to-digital converter system comprises a quantizer assembly and a configuration control. The quantizer assembly is configurable to provide at least one quantization stage. A given quantization stage converts an associated analog signal into an associated digital output signal. The configuration control selects among a plurality of configurations and configures the analog-to-digital converter system according to the selected configuration. The quantizer assembly is configurable to provide a plurality of quantization stages arranged in series in a first configuration, or to provide a single quantization stage in a second configuration.