CLOCK PERIOD RANDOMIZATION FOR DEFENSE AGAINST CRYPTOGRAPHIC ATTACKS
    1.
    发明申请
    CLOCK PERIOD RANDOMIZATION FOR DEFENSE AGAINST CRYPTOGRAPHIC ATTACKS 审中-公开
    时钟周期随机化防御加密密钥攻击

    公开(公告)号:WO2017147116A1

    公开(公告)日:2017-08-31

    申请号:PCT/US2017/018813

    申请日:2017-02-22

    Applicant: GOOGLE INC.

    Inventor: STARK, Donald

    Abstract: Methods, systems, and apparatuses for defending against cryptographic attacks using clock period randomization. The methods, systems, and apparatuses are designed to make side channel attacks and fault injection attacks more difficult by using a clock with a variable period during a cryptographic operation. In an example embodiment, a clock period randomizer includes a fixed delay generator and a variable delay generator, wherein a variable delay generated by the variable delay generator is based on a random or pseudorandom value that is changed occasionally or periodically. The methods, systems, and apparatuses are useful in hardware security applications where fault injection and/or side channel attacks are of concern.

    Abstract translation: 用于防御使用时钟周期随机化的密码攻击的方法,系统和装置。 这些方法,系统和设备被设计成通过在密码操作期间使用具有可变周期的时钟来使侧信道攻击和故障注入攻击更加困难。 在示例实施例中,时钟周期随机数发生器包括固定延迟发生器和可变延迟发生器,其中由可变延迟发生器产生的可变延迟基于随机或周期性改变的随机或伪随机值。 这些方法,系统和设备在涉及故障注入和/或侧信道攻击的硬件安全应用中是有用的。

    FREQUENCY SENSOR FOR SIDE-CHANNEL ATTACK
    2.
    发明申请
    FREQUENCY SENSOR FOR SIDE-CHANNEL ATTACK 审中-公开
    用于侧向通道攻击的频率传感器

    公开(公告)号:WO2017053074A1

    公开(公告)日:2017-03-30

    申请号:PCT/US2016/050662

    申请日:2016-09-08

    CPC classification number: G06F1/08 G06F21/554 G06F2221/034 H04L9/004 H04L9/005

    Abstract: A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus may be used for detecting an incorrect clock frequency. In one example, the apparatus includes a first circuit configured to compare a clock signal period to a delay period. Additionally, in one example, the apparatus includes a second circuit configured to output a first signal. The period of the first signal may be double the clock signal period when the clock signal period is greater than the delay period. The apparatus may, in one example, also include a third circuit configured to output a second signal. The period of the second signal may be greater than double the clock signal period when the clock signal period is greater than the delay period.

    Abstract translation: 提供了一种用于无线通信的方法,装置和计算机程序产品。 该装置可用于检测不正确的时钟频率。 在一个示例中,该装置包括被配置为将时钟信号周期与延迟周期进行比较的第一电路。 另外,在一个示例中,该装置包括被配置为输出第一信号的第二电路。 当时钟信号周期大于延迟周期时,第一信号的周期可以是时钟信号周期的两倍。 在一个示例中,该装置还可以包括被配置为输出第二信号的第三电路。 第二信号的周期可以大于时钟信号周期大于延迟周期的时钟信号周期的两倍。

    半導体装置
    4.
    发明申请
    半導体装置 审中-公开
    半导体器件

    公开(公告)号:WO2015008335A1

    公开(公告)日:2015-01-22

    申请号:PCT/JP2013/069320

    申请日:2013-07-16

    Inventor: 菅原 健

    Abstract:  クロック信号に同期したパルス列であるイネーブル信号を生成し、保護対象回路(30)に対してイネーブル信号を供給するイネーブル生成回路(10)と、クロック信号とイネーブル生成回路で生成されたイネーブル信号との比較に基づいて、クロック信号に対してスパイクが導入されたことによるクロックタイミングの異常を検出する第1の異常検出回路(20)とを備えることで、局所的なクロック異常を検出可能とする半導体装置を得る。

    Abstract translation: 该半导体器件具有:使能信号发生电路(10),用于产生与时钟信号同步的脉冲串的使能信号,并将使能信号提供给保护电路(30); 以及第一异常检测电路(20),用于根据由使能信号发生电路产生的时钟信号和使能信号的比较,检测由于将尖峰引入时钟信号中的时钟定时异常,由此 获得可以检测局部时钟异常的装置。

    CALCULATION PROTECTED AGAINST SPYING
    5.
    发明申请
    CALCULATION PROTECTED AGAINST SPYING 审中-公开
    保护,以防止间谍受保护的计算

    公开(公告)号:WO2013127519A3

    公开(公告)日:2014-01-23

    申请号:PCT/EP2013000559

    申请日:2013-02-26

    Abstract: The invention provides a method for carrying out a cryptographic calculation comprising a plurality of blocks, in a manner protected against spying of secret data, using secret data in a processor. In order to achieve a calculation result, a multiple calculation is carried out, during which the calculation is carried out several times, at least twice. Within the multiple calculation, blocks of the plurality of, at least two, operations of carrying out the calculation are carried out in interleaved order.

    Abstract translation: 本发明提供了针对刺探出秘密数据执行多个包含在处理器中使用的秘密数据加密计算块的受保护的方法。 为了获得的计算的计算结果,多执行计算,其中,所述计算重复数次,至少进行两次。 内以交错顺序的多个执行的计算中的至少两个通道的所述多个计算块。

    CRYPTOGRAPHIC METHOD FOR PROTECTING A KEY HARDWARE REGISTER AGAINST FAULT ATTACKS
    6.
    发明申请
    CRYPTOGRAPHIC METHOD FOR PROTECTING A KEY HARDWARE REGISTER AGAINST FAULT ATTACKS 审中-公开
    用于保护关键硬件寄存器以防止故障攻击的CRYPTOGRAPHIC方法

    公开(公告)号:WO2013083485A1

    公开(公告)日:2013-06-13

    申请号:PCT/EP2012/074063

    申请日:2012-11-30

    Applicant: GEMALTO SA

    CPC classification number: H04L9/004 G06F21/55 G06F21/755 H04L2209/26

    Abstract: The present invention relates to cryptographic method that are resistant to fault injection attacks, to protect the confidentiality and the integrity of secret keys. For that, the invention describes a method to protect a key hardware register against fault attack, this register being inside an hardware block cipher BC embedded inside an electronic component, said component containing stored inside a memory area a cryptographic key K, characterized in that it comprises following steps: A.) loading the key Kram inside said register; B.) computing a value X such as K=BC(K,X); C.) after at least one sensitive operation, computing a value V such as V=BC(K,X); D.) matching the value V with the key Kram value stored in the memory area; E.) if the matching is not ok detecting that a fault occurs.

    Abstract translation: 本发明涉及抵御故障注入攻击的密码方法,以保护秘密密钥的机密性和完整性。 为此,本发明描述了一种保护密钥硬件寄存器免受故障攻击的方法,该寄存器位于嵌入在电子部件内部的硬件块密码BC内,所述组件包含存储在存储器区域内的加密密钥K,其特征在于: 包括以下步骤:A.)将密钥加载到所述寄存器内; 计算诸如K = BC(K,X)的值X; 在至少一个敏感操作之后,计算诸如V = BC(K,X)的值V; D.将值V与存储在存储区域中的密钥克隆值进行匹配; 如果匹配不正确,则检测到故障发生。

    信号処理装置
    7.
    发明申请
    信号処理装置 审中-公开
    信号处理装置

    公开(公告)号:WO2013005313A1

    公开(公告)日:2013-01-10

    申请号:PCT/JP2011/065455

    申请日:2011-07-06

    Abstract:  演算回路1からの出力信号Dtを遅延素子3が遅延させて遅延信号Ddを出力し、XOR素子4が出力信号Dtと遅延信号Ddを比較し、両者が一致すれば信号値"0"のXORout信号を出力し、両者が一致しない場合は、信号値"1"のXORout信号を出力する。フリップフロップ61においてクロック信号CKのクロック立ち上がり時のXORout信号の信号値が"0"であれば、フリップフロップ6から出力信号Dtが出力され、クロック立ち上がり時のXORout信号の信号値が一度でも"1"になれば、信号値"0"の固定値が出力され続ける。

    Abstract translation: 延迟元件(3)延迟来自计算电路(1)的输出信号(Dt)并输出延迟信号(Dd)。 如果信号匹配,则XOR元件(4)将输出信号(Dt)与延迟信号(Dd)进行比较,输出信号值0 XORout信号,如果信号不匹配则输出信号值1XORout信号。 在触发器(61)中,如果在时钟信号(CK)上升时XORout信号值为0,则从触发器(6)输出输出信号(Dt),如果XORout信号值 当时钟信号(CK)上升时,其为1偶数,继续输出信号值0的固定值。

    METHOD AND DEVICES FOR PROTECTING A MICROCIRCUIT FROM ATTACKS FOR OBTAINING SECRET DATA
    8.
    发明申请
    METHOD AND DEVICES FOR PROTECTING A MICROCIRCUIT FROM ATTACKS FOR OBTAINING SECRET DATA 审中-公开
    用于保护MICROCIRCUIT从攻击获得秘密数据的方法和设备

    公开(公告)号:WO2009092903A2

    公开(公告)日:2009-07-30

    申请号:PCT/FR2008001544

    申请日:2008-11-03

    CPC classification number: H04L9/004 G06F7/582 H04L2209/805

    Abstract: The invention relates to a method for protecting a microcircuit (12) from attacks for obtaining secret data (K, M) used when the microcircuit runs a cryptography algorithm (10). Said method comprises a step of generating at least one parameter (P) for protecting the secret data (K, M), and a step of modifying the running of the cryptography algorithm by means of said protection parameter (P). Said method comprises steps of defining a generating function (20' a) by successively applying, to at least one pre-determined secret parameter (S) stored in the memory (16), a sequence of values that can be determined only from said secret parameter (S) and said function (20' a), and of reproducibly generating the protection parameter (P) from at least one value of said sequence.

    Abstract translation: 本发明涉及一种用于保护微电路(12)免受攻击的方法,用于获取当微电路运行密码算法(10)时使用的秘密数据(K,M)。 所述方法包括产生用于保护秘密数据(K,M)的至少一个参数(P)的步骤,以及通过所述保护参数(P)修改密码算法运行的步骤。 所述方法包括以下步骤:通过将存储在存储器(16)中的至少一个预定的秘密参数(S)连续地应用到只能从所述秘密确定的一系列值来定义生成函数(20'a) 参数(S)和所述功能(20'a),并且从所述序列的至少一个值可重复地产生保护参数(P)。

    资讯安全传递系统
    9.
    发明申请

    公开(公告)号:WO2009033405A1

    公开(公告)日:2009-03-19

    申请号:PCT/CN2008/072255

    申请日:2008-09-03

    Applicant: 诸凤璋

    Inventor: 诸凤璋

    Abstract: An information security transmission system is provided, which includes a first information device and a second information device. The first information device obtains at least authentication information and connects with the second information device via a network for information exchange. The system obtains the key pairs for encryption and decryption with or without the help of certification center, builds an information transmission security channel, encrypts and decrypts for the transmitted information and keeps the security of the transmitted information. The first information device has a first dynamic encoder/decoder and the second information device has a second dynamic encoder/decoder respectively. The first dynamic encoder/decoder and the second first dynamic encoder/decoder encode dynamically and ensure a one-time completion of error-free transmission and safety of the transmitted information with mechanism of auto error-detection and mechanism of auto error-correction. And the transmitted information has an access limitation, which makes the receiving party access the transmitted information in the limitation of an accessing condition and delete all the transmitted information when exceeding the accessing limitation so as to prevent the transmitted information from out-flowing.

    Fault攻撃対策機能を備えた組み込み装置
    10.
    发明申请
    Fault攻撃対策機能を備えた組み込み装置 审中-公开
    具有故障攻击计数器功能的装置

    公开(公告)号:WO2008114310A1

    公开(公告)日:2008-09-25

    申请号:PCT/JP2007/000240

    申请日:2007-03-16

    CPC classification number: H04L9/302 G09C1/00 H04L9/004 H04L9/0662 H04L2209/12

    Abstract:  中国人剰余定理(CRT)を用いたRSA復号処理を行う暗号処理装置であって、前記RSA復号処理は、暗号文を c 、法を n 、秘密鍵を d とおくと、 c d (mod n) で表され、また、法 n は二つの素数 p 、 q を用いて n = p×q と表されるものであって、乱数 r を用意する乱数生成手段と、前記p 、 q を法とする指数剰余演算を実行した後に平文を計算するステップにおいて前記乱数 r に応じて u = p -1  (mod q) を用いた計算方式かもしくは v = q -1  (mod p) を用いた計算方式かのいずれかを選択する復号化経路選択手段と、を含む暗号処理装置。

    Abstract translation: 一种使用中文余数理论(CRT)进行RSA解密的加密设备。 RSA解密由C(D)表示,其中c是加密文本,n是模数,d是秘密密钥,并且模数n由n = pOE表示,其中p和 q是主要数字。 加密装置包括随机数生成装置,用于准备随机数r和解密路径选择装置,用于根据随机数r或a选择使用u = p-1(mod q)的计算方法 在使用模数p,q执行指数余数运算之后,在计算纯文本的步骤中使用v = q 0 - 1(mod p)的计算方法。

Patent Agency Ranking